Method for regulating supply voltage

1. Method for regulating the supply voltage Uo of an electronic circuit,

according to which method a regulating element with variable resistivity that conducts a supply current for the electronic circuit in a regulating circuit and to an input terminal of which an outer supply voltage Ui is applied, is controlled by an amplified difference between a reference voltage and a part of a regulated supply voltage Uo,

characterized in

that an instant, on which the regulating circuit and the electronic circuit start operating, is detected,

that such value of the reference voltage is set on said instant of the operation start

that the regulated supply voltage Uo will equal a maximum allowable supply voltage of the electronic circuit and the supplied electronic circuit puts itself in a state of a maximum current consumption,

that an operating voltage drop (Ui-Uo)w across said regulating element is measured at regular time intervals and

the reference voltage is then each time reduced by one degree until said operating voltage drop (Ui-Uo)w is below or equals a chosen most appropriate value (Ui-Uo)optim of said operating voltage drop,

and that the supplied electronic circuit puts itself in a state of a normal current consumption,

when said operating voltage drop (Ui-Uo)w has exceeded the chosen most appropriate value (Ui-Uo)optim of said voltage drop.

2. Method as recited in claim 1 , characterized in that said operating voltage drop (Ui-Uo)w is uninterruptedly measured from putting into normal current conditions on and,

if its value decreases below a chosen minimum value (Ui-Uo)min of said operating voltage drop due to a disturbance in the outer supply voltage Ui,

a flag is set in a memory in the case of a disturbance potentially dangerous to the electronic circuit,

which flag indicates that the electronic circuit should be supplied at said operating voltage drop (Ui-Uo)w increased for one degree ΔUow after a first operating start of the regulating circuit and the electronic circuit following the flag setting in the memory.

3. Method as recited in claim 2 , characterized in that the decrease of said operating voltage drop (Ui-Uo)w below chosen minimum value (Ui-Uo)min of said operating voltage drop at least in a duration of a halfperiod of a signal with highest frequency entering the electronic circuit or

of a halfperiod of a internal signals with highest frequency in the electronic circuit

is recognized to be a disturbance potentially dangerous to the electronic circuit.

4. Method as recited in claim 2 , characterized in

that short-time disturbances occurring with a frequency below the highest frequency of the signal entering the electronic circuit or of the internal signals of the electronic circuit are recognized to be disturbances potentially dangerous to the electronic circuit.

5. Method as recited in claim 3 , characterized in

that after the flag has been set in the memory, the regulating circuit and the electronic circuit start operating at the operating voltage drop (Ui-Uo)w increased for one degree ΔUow, when the electronic circuit for the first time changes over into a quiescent state or a stand-by state.

6. Method as recited in claim 3 , characterized in

that also after the first operating start of the regulating circuit and the electronic circuit,

after said operating voltage drop (Ui-Uo)w has before been increased for one degree ΔUow due to the potentially dangerous disturbances,

the regulating circuit and the electronic circuit restart operating at the operating voltage drop increased for one degree ΔUow

only if, in the previous operation also at said increased operating voltage drop, the value of the operating voltage drop has ever repeatedly decreased below a chosen maintaining value (Ui-Uo)m of said operating voltage drop due to the disturbances in the outer supply voltage Ui.

7. Method as recited in claim 1 , characterized in

that the instant, on which the regulating circuit and the electronic circuit start operating, is the instant, on which two differences of two values, namely of the outer supply voltage Ui and the regulated supply voltage Uo, measured one after another, decrease below a chosen value ranged in an interval from 10 mV to 100 mV.

8. Method as recited in claim 7 , characterized in that said operating voltage drop (Ui-Uo)w in the state of maximum current consumption is increased in regular time intervals of 0.1 millisecond to several milliseconds in the degrees ΔUow, whose values range in an interval from 100 mV to 300 mV.

9. Method as recited in claim 8 , characterized in that a minimum value of said operating voltage drop (Ui-Uo)w, which still enables the regulating circuit to operate normally, is chosen as said minimum value (Ui-Uo)min of said operating voltage drop.

10. Method as recited in claim 9 , characterized in that the minimum value (Ui-Uo)min of said operating voltage drop is chosen in an interval ranging from 100 mV to 500 mV.

11. Method as recited in claim 9 , characterized in

that said most appropriate value (Ui-Uo)optim of said operating voltage drop, increased by a provided level of the disturbances in the outer supply voltage (Ui), is chosen as said most appropriate value (Ui-Uo)min of said operating voltage drop.

12. Method as recited in claim 11 , characterized in that said minimum value (Ui-Uo)min of said operating voltage drop, increased by one degree ΔUow at increasing said operating voltage drop, is chosen as said maintaining value (Ui-Uo)m of said operating voltage drop.

13. Method as recited in claim 12 , characterized in that the maintaining value (Ui-Uo)m of said operating voltage drop is approximately 1.5 times the minimum value (Ui-Uo)min of said operating voltage drop.

14. Method as recited in claim 12 , characterized in that the maintaining value (Ui-Uo)m of said operating voltage drop is chosen in an interval ranging from 120 mV to 700 mV.