IP Library › Granted Patent US 8,143,531
Granted Patent B2
US 8,143,531 · App. 12/276,772 · Granted Mar 27, 2012

Electronic component mounting package

Assignee: Shinko Electric Industries Co., Ltd.
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Quick Facts
Patent No.
US 8,143,531
App. No.
12/276,772
Granted
Mar 27, 2012
Kind
B2
Abstract

An electronic component mounting package includes a structure (coreless substrate) in which a plurality of wiring layers are stacked one on top of another with insulating layers interposed therebetween and are interconnected through via holes formed in the insulating layers. The entire surface of the coreless substrate, exclusive of pad portions defined at desired positions of the outermost wiring layers thereof, is covered with a molding resin. Further, an interposer is mounted on the side of the electronic component mounting surface of the coreless substrate, and the molding resin is partially filled into a gap between the coreless substrate and the interposer.

Claims (8)

1. An electronic component mounting package comprising:

a structure including a plurality of wiring layers stacked one on top of another with an insulating layer interposed therebetween and interconnected through via holes formed in the insulating layers, the structure having a first surface and a second surface opposite to the first surface;

an interposer having a first surface on which an electronic component is to be mounted, and a second surface opposite to the first surface, the interposer being mounted with the second surface thereof facing the first surface of the structure; and

a molding resin formed to cover the entire surface of the structure, exclusive of pad portions defined in outermost wiring layers on respective sides of the first surface and the second surface of the structure,

wherein the molding resin is filled into a gap between the structure and the interposer, covers a side surface of the interposer and has a depression for mounting the interposer therewith the depression including a cavity such that the first surface of the interposer is on a level with a bottom surface of the cavity, and

wherein the interposer is connected via a connection terminal to the pad portion on the first surface of the structure.

2. The electronic component mounting package according to claim 1 , further comprising a capacitor mounted around the interposer on the first surface of the structure, the capacitor being embedded in the molding resin surrounding the interposer.

3. The electronic component mounting package according to claim 1 , wherein silicon is used as a material constituting the interposer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 1, 2008
From: MIKI, SYOTA; ARAI, TADASHI
To: SHINKO ELECTRIC INDUSTRIES CO., LTD.
Reel/Frame 021905/0805 →
Priority Claims (1)
JP 2007-314280 · Dec 5, 2007 · national
Continuity (1)
Related Publication 20090145636A1 · Jun 11, 2009