IP Library Granted Patent US 8,148,721
Granted Patent B2
US 8,148,721 · App. 12/515,268 · Granted Apr 3, 2012

Bottom gate type thin film transistor, method of manufacturing the same, and display apparatus

Assignee: Canon Kabushiki Kaisha
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Quick Facts
Patent No.
US 8,148,721
App. No.
12/515,268
Granted
Apr 3, 2012
Kind
B2
Abstract

Provided is a bottom gate type thin film transistor including on a substrate ( 1 ) a gate electrode ( 2 ), a first insulating film ( 3 ) as a gate insulating film, an oxide semiconductor layer ( 4 ) as a channel layer, a second insulating film ( 5 ) as a protective layer, a source electrode ( 6 ), and a drain electrode ( 7 ), in which the oxide semiconductor layer ( 4 ) includes an oxide including at least one selected from the group consisting of In, Zn, and Sn, and the second insulating film ( 5 ) includes an amorphous oxide insulator formed so as to be in contact with the oxide semiconductor layer ( 4 ) and contains therein 3.8×10 19 molecules/cm 3 or more of a desorbed gas observed as oxygen by temperature programmed desorption mass spectrometry.

Claims (31)

1. A bottom gate type thin film transistor, comprising on a substrate:

a gate electrode:

a first insulating film as a gate insulating film;

an oxide semiconductor layer as a channel layer;

a second insulating film as a protective layer;

a source electrode; and

a drain electrode,

wherein the oxide semiconductor layer comprises an oxide including at least one of In, Zn, and Sn,

wherein the second insulating film is formed using an oxide including at least one of Si and Al as a sputtering target, and a sputtering gas with an oxygen concentration of 10 vol % or more and 50 vol % or less; and

wherein the second insulating film is formed so as to contain therein 3.8×10 19 molecules/cm 3 or more of a desorbed gas observed as oxygen by temperature programmed desorption mass spectrometry.

2. The bottom gate type thin film transistor according to claim 1 , wherein the oxide semiconductor layer comprises an amorphous oxide including In, Zn, and Ga.

3. The bottom gate type thin film transistor according to claim 1 , wherein the desorbed gas observed as oxygen is a desorbed gas by temperature programmed desorption mass spectrometry in the case where the temperature of the surface of the substrate is heated from 50° C. to 800° C.

4. An apparatus, comprising:

an electro-optical device having a pixel electrode; and

the bottom gate type thin film transistor according to claim 1 ,

wherein said pixel electrode is connected to one of the source electrode and the drain electrode of the bottom gate type thin film transistor.

5. The apparatus according to claim 4 , wherein the electro-optical device is an electroluminescence device.

6. The apparatus according to claim 4 , wherein the electro-optical device is a liquid crystal cell.

7. The apparatus according to claim 4 , wherein a plurality of the electro-optical devices and a plurality of the bottom gate type thin film transistors are arranged two-dimensionally on a substrate.

8. A method of manufacturing a bottom gate type thin film transistor, the transistor comprising on a substrate a gate electrode, a first insulating film as a gate insulating film, an oxide semiconductor layer as a channel layer, a second insulating film as a protective layer, a source electrode, and a drain electrode, the method comprising the steps of:

forming the gate electrode on the substrate;

forming the first insulating film and the oxide semiconductor layer in the stated order;

patterning the first insulating film and the oxide semiconductor layer;

forming the second insulating film by sputtering in an atmosphere including an oxidizing gas;

patterning the second insulating film so as to cover at least a part of a channel region of the oxide semiconductor layer;

forming the source electrode and the drain electrode; and

patterning the source electrode and the drain electrode using the second insulating film as an etching stopper,

wherein the step of forming the second insulating film uses an oxide including at least one of Si and Al as a sputtering target, and a sputtering gas with an oxygen concentration of 10 vol % or more and 50 vol % or less; and

wherein the second insulating film is formed so as to contain therein 3.8×10 19 molecules/cm 3 or more of a desorbed gas observed as oxygen by temperature programmed desorption mass spectrometry.

9. The method according to claim 8 , wherein the step of forming the oxide semiconductor layer, the first and second insulating film, and the gate electrode, source electrode and drain electrode are performed at room temperature.

10. The method according to claim 8 , wherein the oxygen is a desorbed gas observed as oxygen by temperature programmed desorption mass spectrometry in the case where the temperature of the surface of the substrate is heated from 50° C. to 800° C.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 31, 2009
From: HAYASHI, RYO; KAJI, NOBUYUKI; YABUTA, HISATO
To: CANON KABUSHIKI KAISHA
Reel/Frame 023168/0178 →
Priority Claims (2)
JP 2006-328308 · Dec 5, 2006 · national
JP 2007-273863 · Oct 22, 2007 · national
Continuity (1)
Related Publication 20100051936A1 · Mar 4, 2010