Stacked semiconductor package
A stacked semiconductor package is presented which includes multiple semiconductor chips and through-electrodes. Each semiconductor chip has bonding pads formed on a first surface of the semiconductor chip and has a projection which projects from a portion of a second surface of the semiconductor chip. The first and second surfaces of the semiconductor chip face away from each other the first surface. The through-electrodes pass through the first surface and through the projection on the second surface.
1. A semiconductor package comprising:
a semiconductor chip comprising bonding pads and a projection, wherein the bonding pads are formed on a first surface of the semiconductor chip and the projection projects from a portion of a second surface of the semiconductor chip, wherein the second surface faces away from the first surface;
a reinforcing layer disposed on the projection;
through-electrodes passing through the first surface and the projection on the second surface, and passing through the reinforcing layer; and
guide members placed on the second surface of the semiconductor chip.
2. The semiconductor package according to claim 1 , wherein the projection is disposed along a middle portion of the second surface and has a rectangular shape, and wherein the projection and the semiconductor chip are integrally formed with each other.
3. The semiconductor package according to claim 1 , wherein a plurality of projections is disposed in a matrix pattern on the second surface, wherein the projections and the semiconductor chip are integrally formed with each other.
4. The semiconductor package according to claim 1 , wherein the reinforcing layer comprises any one of a non-conductive adhesive (NCA), a non-conductive film (NCF) or a non-conductive polymer (NCP).
5. The semiconductor package according to claim 1 , wherein the reinforcing layer comprises an anisotropic conductive film (ACF).
6. The semiconductor package according to claim 1 , wherein the guide members are placed parallel to one of a short side or a long side of the semiconductor chip.
7. The semiconductor package according to claim 1 , wherein the projection occupies about 5˜25% of an overall area of the second surface.
8. The semiconductor package according to claim 1 , wherein at least two through-electrodes pass through the semiconductor chip in correspondence to the projection.
9. The semiconductor package according to claim 1 , further comprising bumps and pads placed on ends of the through-electrodes which correspond to the projection.
10. The semiconductor package according to claim 9 , wherein the bumps and pads are formed of any one selected from the group consisting of solder, gold, copper and aluminum.
11. The semiconductor package according to claim 1 , wherein at least two semiconductor chips are stacked together such that a first surface of a first semiconductor chip and a second surface of a second semiconductor chip are disposed facing each other.
12. The semiconductor package according to claim 11 , further comprising a coating layer disposed between the first surface of the first semiconductor chip and the second surface of the second semiconductor chip, wherein the coating layer contains any one of a hydrophilic substance and a lipophilic substance.
13. The semiconductor package according to claim 11 , further comprising a gap-fill member interposed between the stacked semiconductor chips, wherein the gap-fill member contains any one of a hydrophilic substance and a lipophilic substance.
14. A semiconductor package comprising:
a semiconductor chip having a first and second surface, bonding pads are disposed on the first surface, and the second surface having a flat part and a recess part, wherein the semiconductor chip has a first thickness when measured from the first surface to the flat part and has a second thickness when measured from the first surface to the recessed part such that the second thickness is less than the first thickness;
a reinforcing layer disposed on the flat part;
through-electrodes passing through the first surface and the flat part, and passing through the reinforcing layer; and
guide members placed on the second surface of the semiconductor chip.
15. The semiconductor package according to claim 14 , wherein the guide members are placed parallel to one of a short side and a long side of the semiconductor chip.
16. The semiconductor package according to claim 14 , wherein at least two semiconductor chips are stacked together such that a first surface of a first semiconductor chip and a second surface of a second semiconductor chip are disposed facing each other when stacked together.
17. The semiconductor package according to claim 16 , further comprising a coating layer disposed between the first surface of the first semiconductor chip and the second surface of the second semiconductor chip, the coating layer containing any one of a hydrophilic substance and a lipophilic substance.
18. The semiconductor package according to claim 16 , further comprising a gap-fill member interposed between the stacked semiconductor chips and containing any one of a hydrophilic substance and a lipophilic substance.