IP Library › Granted Patent US 8,164,491
Granted Patent B2
US 8,164,491 · App. 12/783,294 · Granted Apr 24, 2012

Coefficient multiplier and digital delta-sigma modulator using the same

Assignee: Electronics and Telecommunications Research Institute
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Quick Facts
Patent No.
US 8,164,491
App. No.
12/783,294
Granted
Apr 24, 2012
Kind
B2
Abstract

Provided are a coefficient multiplier and digital delta-sigma modulator using the same. The coefficient multiplier has the average of output signals of respective dependent multipliers as an effective coefficient using a coefficient averaging technique without employing an adder that has a complex structure and occupies a large chip area. Accordingly, the coefficient multiplier has a simple hardware constitution and small chip area in comparison with a canonical signed digit (CSD) coefficient multiplier, and the digital delta-sigma modulator employing the coefficient multiplier has a simple structure and small size.

Claims (19)

1. A coefficient multiplier, comprising:

a plurality of dependent multipliers for outputting products of an input signal and coefficients; and

a switch for alternately outputting the output products of the dependent multipliers according to a switch control signal,

wherein an average of an output signal output from the switch is an effective coefficient.

2. The coefficient multiplier of claim 1 , wherein when a duty of the switch control signal is changed, the average of the output signal output from the switch is changed, and the effective coefficient is changed.

3. A coefficient multiplier, comprising:

a dependent multiplier in which a plurality of input buffers are respectively connected to a plurality of output buffers through a plurality of switches, wherein the input buffers are respectively shifted by the switches according to a switch control signal, and a coefficient of the dependent multiplier is alternately changed into powers of two, and

wherein an average of output signals output from the output buffers is an effective coefficient.

4. The coefficient multiplier of claim 3 , wherein when a duty of the switch control signal is changed, the average of the output signals output from the output buffers is changed, and the effective coefficient is changed.

5. A digital delta-sigma modulator comprising:

a plurality of coefficient multipliers;

a plurality of adders;

a plurality of accumulators; and

a quantizer,

wherein each of the coefficient multipliers comprising:

a plurality of dependent multipliers for outputting products of an input signal and coefficients; and

a switch for alternately outputting the output products of the dependent multipliers according to a switch control signal,

wherein the coefficient multiplier has an average of an output signal output from the switch as an effective coefficient.

6. The digital delta-sigma modulator of claim 5 , wherein when a duty of the switch control signal is changed, the average of the output signal output from the switch of the coefficient multiplier is changed, and the effective coefficient of the coefficient multiplier is changed.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 20, 2010
From: CHO, MIN HYUNG; KIM, YI GYEONG; KWON, JONG KEE
To: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
Reel/Frame 024415/0546 →
Priority Claims (1)
KR 10-2009-0124438 · Dec 15, 2009 · national
Continuity (1)
Related Publication 20110140940A1 · Jun 16, 2011