IP Library › Granted Patent US 8,168,472
Granted Patent B2
US 8,168,472 · App. 13/270,265 · Granted May 1, 2012

Semiconductor device having a semiconductor chip, and method for the production thereof

Assignee: Infineon Technologies AG
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Quick Facts
Patent No.
US 8,168,472
App. No.
13/270,265
Granted
May 1, 2012
Kind
B2
Abstract

A semiconductor device having a semiconductor chip having an active surface with flip-chip contacts and a passive surface is disclosed. In one embodiment, the flip-chip contacts are surrounded by an electrically insulating layer as underfill material, the layer having a UV B-stageable material. The UV B-stageable material is applied on the active surface of the semiconductor wafer.

Claims (16)

1. A method for producing a semiconductor device, comprising:

producing a semiconductor wafer with semiconductor device positions arranged in rows and columns for semiconductor devices in flip-chip technology with contact areas on an active top side including flip-chip contacts;

applying an electrically insulating layer as underfill material to the active top side of the semiconductor wafer while covering the flip-chip contacts, the electrically insulating layer comprising a UV B-stageable material;

applying a patterned mask on the active top side of the semiconductor wafer;

exposing the mask by means of UV radiation, so that the flip-chip contacts are not exposed and at least a surface of the exposed regions is brought to a cured intermediate state;

removing the unexposed regions of the layer while leaving free at least a tip of the flip-chip contacts; and

separating the semiconductor wafer into individual semiconductor devices.

2. The method according to claim 1 , comprising evaporating solvent after the application of the electrically insulating layer.

3. The method according to claim 1 , wherein before the wafer is separated into individual semiconductor devices, testing the functionality of the semiconductor devices in the semiconductor device positions via the external contact tips.

4. The method according to claim 1 , comprising applying the electrically insulating layer by spin-coating, dispensing, spraying on, jet printing methods, stencil printing methods or dipping methods.

5. The method according to claim 1 , comprising:

providing a rewiring substrate with internal contact areas on its top side and external contact areas on its underside;

applying a semiconductor device on the top side of the rewiring substrate, so that the flip-chip contacts touch the internal contacts;

performing a heat treatment whilst producing electrical connections between the flip-chip contacts and the internal contact areas and whilst curing the UV B-stage material of the layer.

6. The method according to claim 1 , comprising curing at least a surface of the UV B-stageable material to a substantially fully cured state.

7. The method according to claim 1 , wherein the semiconductor chip has a passive surface opposing the active top side, and planar side edges extending between the active top side and the passive surface, and wherein the electrically insulating material layer extends across the active top side and has edges coplanar with and not extending beyond the planar side edges.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2011
From: BAUER, MICHAEL; FUERGUT, EDWARD
To: INFINEON TECHNOLOGIES AG
Reel/Frame 027039/0927 →
Priority Claims (1)
DE 10 2005 046 280 · Sep 27, 2005 · national
Continuity (3)
Division 12852653 · Aug 9, 2010
Division 11535780 · Sep 27, 2006
Related Publication 20120028382A1 · Feb 2, 2012