Nonvolatile semiconductor memory device
A nonvolatile semiconductor memory device includes: a multilayer body with a plurality of insulating films and electrode films alternately stacked therein; a plurality of select gate electrodes provided on the multilayer body, extending in one direction orthogonal to a stacking direction of the multilayer body, and spaced from each other; semiconductor pillars penetrating through the multilayer body and the select gate electrodes; and a charge storage film provided between one of the electrode films and one of the semiconductor pillars, two neighboring ones of the semiconductor pillars penetrating through a common one of the select gate electrodes and penetrating through mutually different positions in a width direction of the select gate electrodes.
1. A nonvolatile semiconductor memory device comprising:
a multilayer body with a plurality of insulating films and electrode films alternately stacked therein;
a plurality of select gate electrodes provided on the multilayer body, extending in one direction orthogonal to a stacking direction of the multilayer body, and spaced from each other;
semiconductor pillars penetrating through the multilayer body and the select gate electrodes; and
a charge storage film provided between one of the electrode films and one of the semiconductor pillars,
two neighboring ones of the semiconductor pillars penetrating through a common one of the select gate electrodes and penetrating through mutually different positions in a width direction of the select gate electrodes, and
a straight line being orthogonal to the stacking direction and connecting between central axes of two of the semiconductor pillars located at shortest distance, the straight line being sloped with respect to both the one direction and another direction orthogonal to the stacking direction and the one direction.
2. The device according to claim 1 , further comprising:
a plurality of bit lines provided on the select gate electrodes and extending in another direction being orthogonal to the stacking direction and crossing the one direction,
a plurality of the semiconductor pillars penetrating through the common one of the select gate electrodes and penetrating alternately along the one direction through one side and another side in the width direction of the select gate electrodes, and a plurality of the semiconductor pillars arranged along the another direction penetrating through an identical side in the width direction of the select gate electrodes.
3. The device according to claim 2 , further comprising:
a connecting member provided below the multilayer body and connecting between lower ends of a pair of the semiconductor pillars respectively penetrating through a neighboring pair of the select gate electrodes; and
a plurality of source lines provided on the select gate electrodes and extending in the one direction,
one of the pair of the semiconductor pillars being connected to one of the source lines and the other of the pair of semiconductor pillars being connected to one of the bit lines, and
a portion of one of the electrode films penetrated by the one of the pair of the semiconductor pillars being spaced from a portion penetrated by the other of the pair of semiconductor pillars.
4. The device according to claim 1 , wherein a slope angle of the straight line with respect to the one direction is 26.6 degrees or less.
5. The device according to claim 1 , wherein one of the electrode films is divided corresponding to a region immediately below one of the select gate electrodes.
6. The device according to claim 1 , wherein the plurality of select gate electrodes are all located in an identical layer.
7. The device according to claim 1 , wherein the plurality of select gate electrodes are located alternately in two layers spaced along the stacking direction.
8. The device according to claim 7 , wherein as viewed in the stacking direction, a distance between neighboring ones of the select gate electrodes is zero.
9. A nonvolatile semiconductor memory device comprising:
a multilayer body with a plurality of insulating films and electrode films alternately stacked therein;
a plurality of select gate electrodes provided on the multilayer body, extending in one direction orthogonal to a stacking direction of the multilayer body, and spaced from each other;
semiconductor pillars penetrating through the multilayer body and the select gate electrodes; and
a charge storage film provided between one of the electrode films and one of the semiconductor pillars,
a straight line being orthogonal to the stacking direction and connecting between central axes of two of the semiconductor pillars located at shortest distance, the straight line being sloped with respect to both the one direction and another direction orthogonal to the stacking direction and the one direction.
10. The device according to claim 9 , wherein a slope angle of the straight line with respect to the one direction is 26.6 degrees or less.