IP Library Granted Patent US 8,223,142
Granted Patent B2
US 8,223,142 · App. 12/389,464 · Granted Jul 17, 2012

Display panel drive apparatus

Assignee: Lapis Semiconductor Co., Ltd.
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Quick Facts
Patent No.
US 8,223,142
App. No.
12/389,464
Granted
Jul 17, 2012
Kind
B2
Abstract

A display panel drive apparatus which can keep display brightness constant, thus preventing the occurrence of unevenness in brightness. The drive apparatus includes a current controlling voltage generating circuit to generate a current control voltage. The drive apparatus also includes a plurality of output drivers to supply brightness pulses whose amplitude is decided based on the current control voltage respectively onto data lines of a display panel in synchronization with a clock signal. The drive apparatus also includes a clock generating circuit to generate a pulse signal of a pulse period based on the current control voltage as the clock signal.

Claims (30)

1. A display panel drive apparatus that drives a current drive type of display panel via data lines, comprising:

a current controlling voltage generating circuit to generate a current control voltage;

a plurality of output drivers to supply brightness pulses based on said current control voltage respectively onto said data lines in synchronization with a clock signal; and

a clock generating circuit to generate a pulse signal having a pulse period based on said current control voltage, said pulse signal being used as said clock signal;

wherein each of said plurality of output drivers comprises:

a drive pulse generating circuit to generate a drive pulse whose pulse width corresponds to brightness data in synchronization with said clock signal; and

a current source circuit to be switched on and off

by said drive pulse, thereby generating a current pulse whose amplitude corresponds to said current control voltage, said current pulse being used as said brightness pulse, and

wherein said clock generating circuit comprises:

at least one minor current source circuit to generate a minor current having a magnitude based on said current control voltage;

an integration circuit to integrate said mirror current; and

a pulse signal generating unit to generate, as said clock signal, a pulse signal having a pulse period based on integration time required by said integration circuit until an integral calculated by said integration circuit reaches a threshold value.

2. A display panel drive apparatus according to claim 1 , wherein said clock generating circuit shortens said pulse period when said current control voltage increases, whereas said clock generating circuit elongates said pulse period when said current control voltage decreases.

3. A display panel drive apparatus according to claim 1 , wherein said minor current source circuit includes a minor current controller to control the magnitude of said minor current depending on the number of generated pulses of said pulse signals.

4. A display panel drive apparatus according to claim 1 , wherein said plurality of output drivers are arranged in parallel with each other and are divided into two groups such that said clock generating circuit is sandwiched between said two groups of said output drivers.

5. A display panel drive apparatus according to claim 4 , wherein said plurality of output drivers and said clock generating circuit are provided on the same substrate, forming an integrated circuit.

6. An apparatus for driving a current drive type of display panel via data lines, comprising:

means for generating a current control voltage;

a plurality of output drivers to supply brightness pulses based on said current control voltage respectively onto said data lines in synchronization with a clock signal; and

clock means for generating a pulse signal having a pulse period based on said current control voltage, said pulse signal being used as said clock signal, whereby brightness of the display panel is maintained even if the current control voltage changes,

wherein each of said plurality of output drivers comprises:

drive pulse means for generating a drive pulse whose pulse width corresponds to brightness data in synchronization with said clock signal; and

current source means to be switched on and off by said drive pulse, thereby generating a current pulse whose amplitude corresponds to said current control voltage, said current pulse being used as said brightness pulse;

wherein said clock means includes:

mirror current means for generating a mirror current having a magnitude based on said current control voltage;

integration means for integrating said minor current; and

means for generating, as said clock signal, a pulse signal having a pulse period based on integration time required by said integration means until an integral calculated by said integration means reaches a threshold value.

7. An apparatus according to claim 6 , wherein said plurality of output drivers are divided into two groups and said clock means in placed between said two groups of said output drivers.

8. An apparatus according to claim 6 , further comprises means for increasing an amount of drive charge non-linearly with a gradation level to be displayed.

9. An apparatus according to claim 7 , further comprises means for increasing an amount of drive charge non-linearly with a gradation level to be displayed.

Assignments (2)
CHANGE OF NAME Recorded Mar 21, 2014
From: OKI SEMICONDUCTOR CO., LTD
To: LAPIS SEMICONDUCTOR CO., LTD.
Reel/Frame 032495/0483 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2009
From: SHIMIZU, NOBUYUKI
To: OKI SEMICONDUCTOR CO., LTD.
Reel/Frame 022287/0265 →
Priority Claims (1)
JP 2008-049566 · Feb 29, 2008 · national
Continuity (1)
Related Publication 20090218958A1 · Sep 3, 2009