IP Library › Granted Patent US 8,223,778
Granted Patent B2
US 8,223,778 · App. 11/932,457 · Granted Jul 17, 2012

Routing table architecture

Assignee: Intel Corporation
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Quick Facts
Patent No.
US 8,223,778
App. No.
11/932,457
Granted
Jul 17, 2012
Kind
B2
Abstract

A system and method for routing a packet between ports for use in a router having a plurality of ports, including a first and a second port, wherein each port includes a plurality of look-up tables (LUTs) and a look-up table select connected to the LUTs. Routing information is loaded into each of the plurality of LUTs while LUT selection information is loaded in the look-up table select. A packet having a plurality of destination bits is received at the first port and a destination port selected within the router to receive the packet. The destination port is selected by applying two or more of the destination bits to the plurality of LUTs in the first port and selecting an output of the plurality of LUTs as a function of one or more of the destination bits, wherein the selected output indicates the port selected to receive the packet. The packet is then routed to the output of the selected port.

Claims (27)

1. A router, comprising:

a plurality of network ports; and

one or more data paths connecting the plurality of network ports;

wherein each network port supports a plurality of virtual channels, wherein each network port includes:

an input;

an output;

a plurality of staging buffers coupled to the output, each of the staging buffers connected to a port router of a different network port;

a multiplexer, connected to the plurality of staging buffers and to the output, for selecting data from the staging buffers to be transferred to the output; and

an input buffer connected to the input, wherein the input buffer includes a port router and a virtual channel input buffer for each of a plurality of virtual input channels, wherein the port router includes a plurality of look-up tables (LUTs) and a LUT select, wherein the plurality of LUTs include route information associated with two or more destination code bits and wherein the LUT select chooses the LUT to use as a function of a plurality of destination code bits;

wherein each virtual channel input buffer receives data from the input corresponding to an associated one of the plurality of virtual channel input buffers and wherein the port router selects a packet from one of the virtual channel input buffers and sends the selected packet to one of the other network ports; wherein each port includes a staging buffer associated with each of the other network ports, wherein each staging buffer includes a virtual channel staging buffer associated with each virtual channel and wherein each staging buffer is sized to permit virtual cut through routing.

2. The router of claim 1 , wherein each LUT provides a deterministic route output port and a two bit virtual channel (VC) code.

3. The router of claim 1 , wherein each LUT provides a deterministic route output port, a mask of allowable adaptive output ports and a two bit virtual channel (VC) code, wherein the mask of allowable adaptive output ports is used to determine if the packet is eligible to route adaptively.

4. The router of claim 1 , wherein the one or more data paths are implemented as a crossbar switch.

5. The router of claim 1 , wherein each output performs arbitration among all its associated staging buffers.

6. The router of claim 5 , wherein arbitration is based on packet aging.

7. In a router having a plurality of ports, wherein each port includes an input and an output for communication with a network node external to the router, a plurality of look-up tables (LUTs) and a look-up table select connected to the LUTs, a method of determining how to route a packet between ports, comprising:

loading routing information into each of the plurality of LUTs;

loading LUT selection information in the look-up table select; wherein the LUT select chooses the LUT to use as a function of a plurality of destination code bits;

receiving, at a first port, a packet having a plurality of destination bits;

selecting a second port to receive the packet, wherein selecting includes applying two or more of the destination bits to the plurality of LUTs in the first port and selecting an output of the plurality of LUTs as a function of one or more of the destination bits, wherein the selected output indicates the second port selected to receive the packet; and

routing the packet to the output of the selected port, wherein each port includes a staging buffer associated with each of the other network ports, wherein each staging buffer includes a virtual channel staging buffer associated with each virtual channel, wherein each staging buffer is sized to permit virtual cut through routing; and wherein routing includes arbitrating between input buffers in each of the input ports.

8. The method of claim 7 , wherein loading route information includes loading a deterministic route output port and a two bit virtual channel (VC) code for each entry in the LUT.

9. The method of claim 7 , wherein loading route information includes loading a deterministic route output port, a mask of allowable adaptive output ports and a two bit virtual channel (VC) code; and

wherein selecting the port includes determining, as a function of the mask of adaptive output ports, if the packet is eligible to route adaptively.

10. The method of claim 7 , wherein routing includes arbitrating between input buffers in each of the input ports.

11. The router of claim 10 , wherein routing includes arbitrating between staging buffers.

12. The router of claim 10 , wherein routing includes arbitrating between staging buffers based on packet aging.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 19, 2012
From: CRAY INC.
To: INTEL CORPORATION
Reel/Frame 028405/0231 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 11, 2008
From: SCOTT, STEVEN L.; ALVERSON, ROBERT
To: CRAY INC.
Reel/Frame 020493/0536 →
Continuity (10)
Continuation 11825618 · Jul 5, 2007
Continuation 11600339 · Nov 14, 2006
Continuation 11439382 · May 22, 2006
Continuation 11358931 · Feb 21, 2006
Continuation 11172460 · Jun 30, 2005
Continuation 10992504 · Nov 18, 2004
Provisional Application 60523256 · Nov 19, 2003
Provisional Application 60523361 · Nov 19, 2003
Provisional Application 60523241 · Nov 19, 2003
Related Publication 20080123679A1 · May 29, 2008