IP Library Granted Patent US 8,235,071
Granted Patent B2
US 8,235,071 · App. 12/871,861 · Granted Aug 7, 2012

Microfluidic bubble logic devices and methods

Assignee: Massachusetts Institute of Technology
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Quick Facts
Patent No.
US 8,235,071
App. No.
12/871,861
Granted
Aug 7, 2012
Kind
B2
Abstract

A method for implementing a logic operation employs an all fluid-based no-moving part micro-mechanical logic family of microfluidic bubble logic devices that are constructed from complex sequences of microfluidic channels, microfluidic bubble modulators for programming the devices, and microfluidic droplet/bubble memory elements for chemical storage and retrieval. The input is a sequence of bubbles/droplets encoding information, with the output being another sequence of bubbles/droplets. For performing a set of reactions/tasks, the modulators program the device by producing a precisely timed sequence of bubbles/droplets, resulting in a cascade of logic operations within the microfluidic channel sequence, utilizing the generated bubbles as a control. The devices are based on the principle of minimum energy interfaces formed between the two fluid phases enclosed inside precise channel geometries. Various devices, including logic gates, non-volatile bistable memory, shift registers, multiplexers, and ring oscillators have been designed and fabricated.

Claims (21)

1. A method for performing a logic operation, comprising the steps of:

creating at least one input stream of gaseous or liquid bubbles disposed within an immiscible liquid, the input stream being configured to be representational of the input for the logic operation; and

flowing the input stream through a configuration of microchannels having interconnections, the microchannels and microchannel interconnections being configured as a logic circuit for performing the logic operation by transforming the input stream into an output stream of gaseous or liquid bubbles disposed within the immiscible liquid, the configuration of the output stream being representational of the result of the logic operation, the microchannels and microchannel interconnections being configured so that the flow, through the microchannels, of the input stream of gaseous or liquid bubbles disposed in an immiscible liquid is controlled by at least one of the group selected from: a resistive or constrictive force caused by interaction between the received input stream of bubbles and the geometry of the microchannels, a resistive or constrictive force caused by interaction between the received input stream of bubbles and the configuration of the microchannel interconnections, and the interaction between bubbles from the received input stream of bubbles and other bubbles.

2. The method of claim 1 , further comprising the step of detecting the composition of the output stream to determine the result of the logic operation.

3. The method of claim 1 , wherein the logic operation is dynamic.

4. The method of claim 1 , wherein the logic operation is static.

5. The method of claim 1 , the step of creating further comprising the step of controlling the disposal of the bubbles in the liquid using a modulator.

6. The method of claim 1 , the step of flowing further comprising the step of controlling the rate of entry of the bubbles into the configuration of microchannels using a modulator.

7. The method of claim 1 , further comprising the step of receiving the bubbles in liquid into a bubble trap as the bubbles are discharged from the configuration of microchannels.

8. The method of claim 1 , wherein the logic circuit is located on a single chip.

9. The method of claim 1 , wherein the geometry of at least one microchannel contains at least one constriction.

10. The method of claim 1 , further comprising the step of annihilating at least some of the bubbles using a bubble annihilator.

11. The method of claim 1 , wherein the step of creating employs a bubble generator.

12. The method of claim 1 , wherein the logic circuit further comprises at least one microfluidic memory element.

13. The method of claim 1 , further comprising the step of switching a larger bubble using a smaller bubble to create gain.

14. The method of claim 1 , wherein the logic operation is an AND, an OR, a NOT, an AND/OR, or an AND/NOT.

15. The method of claim 1 , wherein the configuration of microchannels and microchannel interconnections forms a bistable memory, shift register, modulator, pressure sensor, actuator, or ON/OFF valve.

16. The method of claim 1 , wherein the configuration of microchannels and microchannel interconnections forms a ring oscillator.

17. The method of claim 1 , wherein the logic circuit further comprises a bubble generator.

18. The method of claim 1 , the further comprising the step of cascading at least two configurations of microchannels and microchannel interconnections in order to perform a logic operation.

19. The method of claim 18 , wherein the cascaded configuration of microchannels and microchannel interconnections forms a multiplexor.

Assignments (2)
CONFIRMATORY LICENSE Recorded Jul 23, 2015
From: MASSACHUSETTS INSTITUTE OF TECHNOLOGY
To: NATIONAL SCIENCE FOUNDATION
Reel/Frame 036161/0049 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 5, 2011
From: PRAKASH, MANU; GERSHENFELD, NEIL
To: MASSACHUSETTS INSTITUTE OF TECHNOLOGY
Reel/Frame 026078/0104 →
Continuity (3)
Division 11416449 · May 2, 2006
Provisional Application 60676910 · May 2, 2005
Related Publication 20110048543A1 · Mar 3, 2011