IP Library Granted Patent US 8,247,251
Granted Patent B2
US 8,247,251 · App. 12/653,435 · Granted Aug 21, 2012

Method of fabricating light-emitting element

Assignee: Samsung Electronics Co., Ltd.
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Quick Facts
Patent No.
US 8,247,251
App. No.
12/653,435
Granted
Aug 21, 2012
Kind
B2
Abstract

A method of fabricating a light-emitting element, in which less stress is applied to the light-emitting element, includes: forming element isolation patterns on a substrate; forming a buffer layer on an entire surface of the substrate to directly contact the surface of the substrate and the element isolation patterns and forming light-emitting structure layers on the buffer layer; forming element isolation trenches, which overlap at least part of the element isolation patterns, respectively, buffer layer patterns and light-emitting structures which are separated from each other by the element isolation trenches, respectively, by etching the buffer layer and the light-emitting structure layers; injecting a lift-off solution into the element isolation trenches to remove the element isolation patterns; and removing the substrate.

Claims (15)

1. A method of fabricating a light-emitting element, the method comprising:

forming element isolation patterns on a substrate;

forming a buffer layer on an entire surface of the substrate to directly contact the surface of the substrate and the element isolation patterns and forming light-emitting structure layers on the buffer layer;

forming element isolation trenches, which overlap at least part of the element isolation patterns, respectively, buffer layer patterns and light-emitting structures which are separated from each other by the element isolation trenches, respectively, by etching the buffer layer and the light-emitting structure layers;

injecting a lift-off solution into the element isolation trenches to remove the element isolation patterns; and

removing the substrate,

wherein the removing of the substrate comprises etching the buffer layer patterns by injecting a buffer layer pattern etchant into the element isolation trenches after removing the element isolation patterns.

2. The method of claim 1 , wherein the element isolation patterns are made of silicon oxide (SiO 2 ), and the lift-off solution is hydrogen fluoride (HF).

3. The method of claim 1 , further comprising bonding a support substrate onto the light-emitting structures to face the substrate after removing the element isolation patterns and before removing the substrate, wherein the removing the substrate comprises removing the substrate from the light-emitting structures by radiating a laser beam to the substrate.

4. The method of claim 1 , wherein the buffer layer is formed by an epitaxial lateral overgrowth (ELOG) method.

5. The method of claim 1 , wherein a width of each of the element isolation trenches is less than a width of each of the element isolation patterns so that the element isolation trenches completely overlap the element isolation patterns, respectively.

6. The method of claim 5 , wherein a ratio of a width of a lower part of each of the buffer layer patterns, which directly contacts the substrate after the element isolation patterns are removed, to a width of an upper part of each of the buffer layer patterns, which directly contacts one of the light-emitting structures, is 0.8 to 0.85.

7. The method of claim 6 , wherein a ratio of the width of each of the element isolation trenches to the width of each of the element isolation patterns is greater than 0.2 and less than 1.

8. The method of claim 1 , wherein the removing of the substrate comprises performing a chemical mechanical planarization (CMP) process on the substrate after removing the element isolation patterns.

9. The method of claim 1 , wherein two or more element isolation patterns are separated from each other by a first separation width, and each of the element isolation trenches has a second width, which is greater than the first separation width, and overlaps at least part of each of the element isolation patterns.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2009
From: KIM, YU-SIK
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 023704/0061 →
Priority Claims (1)
KR 10-2008-0127333 · Dec 15, 2008 · national
Continuity (1)
Related Publication 20100151609A1 · Jun 17, 2010