IP Library › Granted Patent US 8,276,822
Granted Patent B2
US 8,276,822 · App. 12/289,995 · Granted Oct 2, 2012

Electronic circuit

Assignee: Keio University
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Quick Facts
Patent No.
US 8,276,822
App. No.
12/289,995
Granted
Oct 2, 2012
Kind
B2
Abstract

An electronic circuit, for which a coil 22 is disposed being overlapped with a region of a memory array 11, carries out communications by inductive coupling between stacked and mounted chips by means of the coil 22 . Because each side of the coil 22 is disposed so as not to be parallel to a word line and a bit line 15, crosstalk between ‘the coil 22 ’ and ‘the word line 14 and bit line 15 ’ can minimized. This allows efficiently arranging a coil to carry out communications by inductive coupling between chips to be stacked and mounted.

Claims (53)

1. An electronic circuit comprising:

a semiconductor substrate including, on the semiconductor substrate, a memory array for storing information, and a coil as an antenna formed by a metal wiring layer being overlapped with a region where the memory array exists;

a transmitter connected to said coil and disposed outside a region where said memory array exists; and

a routing wiring connecting said coil and said transmitter and disposed so as not to be parallel to a line from the group consisting of a bit line and a word line of said memory array.

2. The electronic circuit according to claim 1 , wherein said coil is wound multiple times so as not to be overlapped, including said routing wiring, in a region where said memory array exists.

3. An electronic circuit including, on a semiconductor substrate:

a memory array for storing information; and

a coil as an antenna formed by a metal wiring layer being overlapped with a region where the memory array exists,

wherein said coil has a polygonal shape, each side of which is disposed so as not to be parallel to a line from the group consisting of a bit line and a word line of said memory array.

4. An electronic circuit including, on a semiconductor substrate:

a memory array for storing information; and

a coil as an antenna formed by a metal wiring layer being overlapped with a region where the memory array exists;

a transmitter connected to said coil;

a potential holding circuit that attempts to hold the coil at a predetermined potential; and

a coil driver circuit that drives the coil in accordance with transmission data while holding a potential in a center of the coil at the predetermined potential.

5. An electronic circuit comprising:

a first semiconductor substrate including a first memory array for storing information, and a first coil as an antenna formed by a metal wiring layer being overlapped with a region where the first memory array exists;

a second semiconductor substrate including a second memory array for storing information, and a second coil as an antenna formed by a metal wiring layer being overlapped with a region where the second memory array exists;

first and second transmitters connected to said first and second coils and disposed outside regions where said first and second memory arrays exist; and

first and second routing wirings connecting said first and second coils and said first and second transmitters and disposed so as not to be parallel to a line from the group consisting of a bit line and a word line of said first and second memory arrays;

wherein the first semiconductor substrate and the second semiconductor substrate are stacked and mounted so that a region, on the first semiconductor substrate, where the first coil exists and a region, on the second semiconductor substrate, where the second coil exists are overlapped and the first and second coils carry out wireless communications with each other.

6. The electronic circuit according to claim 5 , wherein a coil from the group consisting of the first and second coil is wound multiple times so as not to be overlapped, including a wiring from the group consisting of said first and second routing wiring, in a region where a memory array from the group consisting of said first and second memory array exists.

7. An electronic circuit comprising:

a first semiconductor substrate including a first memory array for storing information, and a first coil as an antenna formed by a metal wiring layer being overlapped with a region where the first memory array exists;

a second semiconductor substrate including a second memory array for storing information, and a second coil as an antenna formed by a metal wiring layer being overlapped with a region where the second memory array exists,

wherein:

the coil from the group consisting of said first and second coil has a polygonal shape, each side of which is disposed so as not to be parallel to a line from the group consisting of the bit line and word line of said memory array from the group consisting of the first and second memory array, and

the first semiconductor substrate and the second semiconductor substrate are stacked and mounted so that a region, on the first semiconductor substrate, where the first coil exists and a region, on the second semiconductor substrate, where the second coil exists are overlapped and the first and second coils carry out wireless communications with each other.

8. The electronic circuit according to claim 7 further comprising:

a transmitter connected to said coil from the group consisting of the first and second coil;

a potential holding circuit that attempts to hold the coil from the group consisting of the first and second coil at a predetermined potential; and

a coil driver circuit that drives the coil from the group consisting of the first and second coil in accordance with transmission data while holding a potential in a center of the coil from the group consisting of the first and second coil at the predetermined potential;

wherein the first semiconductor substrate and the second semiconductor substrate are stacked and mounted so that a region, on the first semiconductor substrate, where the first coil exists and a region, on the second semiconductor substrate, where the second coil exists are overlapped and the first and second coils carry out wireless communications with each other.

9. An electronic circuit comprising:

a first semiconductor substrate including a memory array for storing information and a first coil as an antenna formed by a metal wiring layer being overlapped with a region where the memory array exists;

a third semiconductor substrate including a third coil as an antenna formed by a metal wiring layer being overlapped with a region where said first coil exists,

wherein:

a transmitter connected to said first coil and disposed outside a region where said memory array exists; and

a routing wiring connecting said first coil and said transmitter and disposed so as not to be parallel to the line from the group consisting of the bit line and word line of said memory array.

10. An electronic circuit comprising:

a first semiconductor substrate including a memory array for storing information and a first coil as an antenna formed by a metal wiring layer being overlapped with a region where the memory array exists;

a third semiconductor substrate including a third coil as an antenna formed by a metal wiring layer being overlapped with a region where said first coil exists,

wherein the first coil is wound multiple times so as not to be overlapped, including said routing wiring, in a region where said memory array exists.

11. An electronic circuit comprising:

a first semiconductor substrate including a memory array for storing information and a first coil as an antenna formed by a metal wiring layer being overlapped with a region where the memory array exists;

a third semiconductor substrate including a third coil as an antenna formed by a metal wiring layer being overlapped with a region where said first coil exists,

wherein said coil from the group consisting of the first and third coil has a polygonal shape, each side of which is disposed so as not to be parallel to the line from the group consisting of the bit line and word line of said memory array.

12. An electronic circuit comprising:

a first semiconductor substrate including a memory array for storing information and a first coil as an antenna formed by a metal wiring layer being overlapped with a region where the memory array exists;

a third semiconductor substrate including a third coil as an antenna formed by a metal wiring layer being overlapped with a region where said first coil exists;

a transmitter connected to said the coil from the group consisting of first and third coil;

a potential holding circuit that attempts to hold the coil from the group consisting of the first and third coil at a predetermined potential; and

a coil driver circuit that drives the coil from the group consisting of the first and third coil in accordance with transmission data while holding a potential in a center of the coil from the group consisting of the first and third coil at the predetermined potential.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2016
From: KEIO UNIVERSITY
To: THRUCHIP JAPAN INC.
Reel/Frame 039529/0854 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2008
From: KURODA, TADAHIRO
To: KEIO UNIVERSITY
Reel/Frame 021879/0863 →
Priority Claims (1)
JP 2008-117532 · Apr 28, 2008 · national
Continuity (1)
Related Publication 20090267848A1 · Oct 29, 2009