IP Library › Granted Patent US 8,289,236
Granted Patent B2
US 8,289,236 · App. 11/984,715 · Granted Oct 16, 2012

Method for replacing a main signal line with a sub signal line when a pixel circuit is defective

Assignee: Sony Corporation
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Quick Facts
Patent No.
US 8,289,236
App. No.
11/984,715
Granted
Oct 16, 2012
Kind
B2
Abstract

An active-matrix-type organic EL display panel having pixel circuits includes a main signal and a sub-signal line wired vertically in parallel to each other. There are two horizontal, parallel wiring lines connecting the main signal line and the sub-signal line.

Claims (28)

1. A display apparatus, comprising:

a plurality of pixel circuits arrayed in a matrix;

a plurality of driving wiring lines to which said pixel circuits are connected; and

a plurality of signal lines wired so as to cross with said plurality of driving wiring lines and having said pixel circuits connected;

said plurality of signal lines being wired in parallel to each other,

wherein said plurality of signal lines include a main signal line and a sub signal line wired vertically in parallel to each other and both the main signal line and the sub signal line are disposed on one side of a column of each of said plurality of pixel circuits, and

the main signal line and the sub signal line are connected to each other by connecting wiring lines horizontally in parallel to each other, including at a first predetermined position where the sub signal line and one of the connecting wiring lines meet and a second predetermined position where the sub signal line and another one of the connecting wiring lines meet,

wherein, where one of said pixel circuits which is to be connected is defective, the main signal line is cut at a predetermined portion between a first position and the defect position and at another predetermined portion between a second position and the defect position, whereby the main signal line between the first and second positions is replaced with the sub signal line.

2. The display apparatus according to claim 1 , wherein the main signal line and the sub signal line are connected to each other at the first position by a connection wiring line and also at the second position by another connection wiring line while the sub signal line is cut on the outside of a processing region with respect to the first position and also on the outside of the processing region with respect to the second position.

3. A fabrication method for a display apparatus which includes a plurality of pixel circuits arrayed in a matrix, a plurality of driving wiring lines to which said pixel circuits are connected, and a plurality of signal lines wired so as to cross with said plurality of driving wiring lines and having said pixel circuits connected, said signal lines being wired in parallel to each other, comprising the steps of:

wiring said signal lines which include a main signal line and a sub signal line which extend in parallel to each other and both said main signal line and said sub signal line are disposed on one side of a column of said plurality of pixel circuits;

connecting the main signal line and the sub signal line to each other at two predetermined first and second positions across each of said pixel circuits in a wiring direction of said signal lines individually by connection wiring lines;

cutting, where one of said pixel circuits which is to be connected is defective, the main signal line at a predetermined portion between the first position and the defect position; and

cutting the main signal line at another predetermined portion between the second position and the defect position, whereby the main signal line between the first and second positions is replaced with the sub signal line.

4. A fabrication method for a display apparatus which includes a plurality of pixel circuits arrayed in a matrix, a plurality of driving wiring lines to which said pixel circuits are connected, and a plurality of signal lines wired so as to cross with said plurality of driving wiring lines and having said pixel circuits connected, said signal lines being wired in parallel to each other, comprising the steps of:

wiring said signal lines which include a main signal line and a sub signal line which extend in parallel to each other and both said main signal line and said sub signal line are disposed on one side of a column of said plurality of pixel circuits;

cutting, where one of said pixel circuits which is to be connected is defective, the main signal line at a predetermined portion between, from between two predetermined first and second positions across the defective pixel circuit in a wiring direction of said signal lines, the first position and the defect position;

cutting the main signal line at another predetermined portion between the second position and the defect position;

connecting the main signal line and the sub signal line to each other at the first position by a connection wiring line;

connecting the main signal line and the sub signal line to each other at the second position by another connection wiring line;

cutting the sub signal line on the outside of a processing region with respect to the first position; and

cutting the sub signal line on the outside of the processing region with respect to the second position, whereby the main signal line between the first and second positions is replaced with the sub signal line.

5. A fabrication method for a display apparatus which includes a plurality of pixel circuits arrayed in a matrix, a plurality of driving wiring lines to which said pixel circuits are connected, and a plurality of signal lines wired so as to cross with said plurality of driving wiring lines and having said pixel circuits connected, said signal lines being wired in parallel to each other, comprising the steps of:

wiring said signal lines which include a main signal line and a sub signal line which extend in parallel to each other, the sub signal line being wired for each of said pixel circuits;

cutting, where one of said pixel circuits which is to be connected is defective, the main signal line at a predetermined portion between, from between two predetermined first and second positions across the defective pixel circuit in a wiring direction of said signal lines, the first position and the defect position;

cutting the main signal line at another predetermined portion between the second position and the defect position;

connecting the main signal line and the sub signal line to each other at the first position by a connection wiring line; and

connecting the main signal line and the sub signal line to each other at the second position by another connection wiring line, whereby the main signal line between the first and second positions is replaced with the sub signal line.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 21, 2007
From: YAMAMOTO, TETSURO; UCHINO, KATSUHIDE; TOYOMURA, NAOBUMI
To: SONY CORPORATION
Reel/Frame 020193/0700 →
Priority Claims (1)
JP 2006-342132 · Dec 20, 2006 · national
Continuity (1)
Related Publication 20080150843A1 · Jun 26, 2008