Reducing distortion using joint storage
A method for data storage includes predefining an order of programming a plurality of analog memory cells that are arranged in rows. The order specifies that for a given row having neighboring rows on first and second sides, the memory cells in the given row are programmed only while the memory cells in the neighboring rows on at least one of the sides are in an erased state, and that the memory cells in the given row are programmed to assume a highest programming level, which corresponds to a largest analog value among the programming levels of the cells, only after programming all the memory cells in the given row to assume the programming levels other than the highest level. Data is stored in the memory cells by programming the memory cells in accordance with the predefined order.
1. A method for data storage, comprising:
storing respective first bits in a group of analog memory cells by writing respective first storage values to the memory cells in the group;
after storing the first bits, computing respective second storage values, each second storage value jointly storing a respective second bit and a respective third bit in a respective memory cell; and
writing the second storage values into the respective memory cells in the group.
2. The method according to claim 1 , wherein writing the second storage values comprises dividing the second storage values into at least first and second subsets, and writing all the second storage values in the second subset only after writing all the second storage values in the first subset.
3. The method according to claim 2 , wherein the second storage values in the first subset are greater than the second storage values in the second subset.
4. The method according to claim 1 , wherein the group of the analog memory cells is one of multiple groups of the memory cells that are arranged in respective rows, and comprising storing the first, second and third bits in each of the groups according to a predefined order.
5. The method according to claim 4 , wherein the memory cells in each group are divided into at least first and second subsets, and wherein the order defines storage in a monotonic order of the groups, and, within each group, storage of the first bits in the first subset, followed by storage of the first bits in the second subset, followed by storage of the second and third bits in the first subset, followed by storage of the second and third bits in the second subset.
6. The method according to claim 4 , wherein the memory cells in each group are divided into at least first and second subsets, and wherein the order defines storage of the first bits in the first subset of a given group, followed by storage of the first bits in the second subset of a given group, followed by storage of the second and third bits in the first subset of another group, followed by storage of the second and third bits in the second subset of the other group.
7. Apparatus for data storage, comprising:
a memory, which comprises a plurality of analog memory cells; and
a control module, which is configured to store respective first bits in a group of the memory cells by writing respective first storage values to the memory cells in the group, to compute, after storing the first bits, respective second storage values, each second storage value jointly storing a respective second bit and a respective third bit in a respective memory cell, and to write the second storage values into the respective memory cells in the group.
8. The apparatus according to claim 7 , wherein the control module is configured to divide the second storage values into at least first and second subsets, and to write all the second storage values in the second subset only after writing all the second storage values in the first subset.
9. The apparatus according to claim 8 , wherein the second storage values in the first subset are greater than the second storage values in the second subset.
10. The apparatus according to claim 7 , wherein the group of the analog memory cells is one of multiple groups of the memory cells that are arranged in respective rows, and wherein the control module is configured to store the first, second and third bits in each of the groups according to a predefined order.
11. The apparatus according to claim 10 , wherein the memory cells in each group are divided into at least first and second subsets, and wherein the order defines storage in a monotonic order of the groups, and, within each group, storage of the first bits in the first subset, followed by storage of the first bits in the second subset, followed by storage of the second and third bits in the first subset, followed by storage of the second and third bits in the second subset.
12. The apparatus according to claim 10 , wherein the memory cells in each group are divided into at least first and second subsets, and wherein the order defines storage of the first bits in the first subset of a given group, followed by storage of the first bits in the second subset of a given group, followed by storage of the second and third bits in the first subset of another group, followed by storage of the second and third bits in the second subset of the other group.