IP Library Granted Patent US 8,309,448
Granted Patent B2
US 8,309,448 · App. 12/646,478 · Granted Nov 13, 2012

Method for forming buried word line in semiconductor device

Assignee: Hynix Semiconductor, Inc.
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Quick Facts
Patent No.
US 8,309,448
App. No.
12/646,478
Granted
Nov 13, 2012
Kind
B2
Abstract

Provided is a method for forming a buried word line in a semiconductor device. The method includes forming a trench by etching a pad layer and a substrate, forming a conductive layer to fill the trench, planarizing the conductive layer until the pad layer is exposed, performing an etch-back process on the planarized conductive layer, and performing an annealing process in an atmosphere of a nitride-based gas after at least one of the forming of the conductive layer, the planarizing of the conductive layer, and the performing of the etch-back process on the planarized conductive layer.

Claims (12)

1. A method for forming a buried word line in a semiconductor device, comprising:

forming a trench by etching a pad layer and a substrate;

forming a conductive layer to fill the trench;

planarizing the conductive layer until the pad layer is exposed;

performing an etch-back process on the planarized conductive layer; and

performing an annealing process in an atmosphere of a nitride-based gas after the forming of the conductive layer, after the planarizing of the conductive layer, and after the performing of the etch-back process on the planarized conductive layer.

2. The method of claim 1 , wherein in the performing of the annealing process, the nitride gas comprises a NH 3 gas.

3. The method of claim 2 , wherein in the performing of the annealing process, the annealing process is performed in an inert gas mixed with the NH 3 gas.

4. The method of claim 3 , wherein the inert gas comprises one of Ar, He, and N 2 .

5. The method of claim 1 , wherein in the performing of the annealing process, the annealing process is a rapid thermal process (RTP) or a furnace type process.

6. The method of claim 1 , wherein in the performing of the annealing process, the annealing process is performed in a temperature range of about 300°C. to 1100 °C. at a process pressure range of about 0.001 torr to 1000 torr for a duration of about 1 second to 10000 seconds.

7. The method of claim 1 , wherein the conductive layer is a single layer of a titanium nitride layer or a bi-layer of a titanium nitride layer and a tungsten layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 23, 2009
From: HWANG, SUN-HWAN; JANG, SE-AUG; OH, KEE-JOON; PARK, SOON-YOUNG
To: HYNIX SEMICONDUCTOR, INC.
Reel/Frame 023696/0779 →
Priority Claims (1)
KR 10-2009-0070990 · Jul 31, 2009 · national
Continuity (1)
Related Publication 20110027988A1 · Feb 3, 2011