Pillar structure having a non-planar surface for semiconductor devices
View Patent ↗A conductive pillar for a semiconductor device is provided. The conductive pillar is formed such that a top surface is non-planar. In embodiments, the top surface may be concave, convex, or wave shaped. An optional capping layer may be formed over the conductive pillar to allow for a stronger inter-metallic compound (IMC) layer. The IMC layer is a layer formed between solder material and an underlying layer, such as the conductive pillar or the optional capping layer.
1. A method of forming a semiconductor device, the method comprising:
providing a substrate having a contact, the substrate comprising an integrated circuit;
forming a passivation layer over the substrate, at least a portion of the contact being exposed; and
forming a conductive pillar over and in electrical contact with the contact, the conductive pillar having a non-planar upper surface, wherein a distance between an uppermost point of the non-planar upper surface and a lowermost point of the non-planar upper surface is about 6% of a width of the conductive pillar.
2. The method of claim 1 , wherein a distance between an uppermost point of the non-planar upper surface and the lowermost point of the non-planar upper surface is greater than a thickness of an inter-metallic compound (IMC) layer overlying the conductive pillar.
3. The method of claim 1 , further comprising forming a capping layer over the conductive pillar.
4. The method of claim 3 , wherein the capping layer is formed of Ni, Pt, Au, or Ag.
5. The method of claim 3 , further comprising forming a solder material overlying the capping layer.
6. The method of claim 1 , wherein the non-planar upper surface is a convex surface.
7. The method of claim 1 , wherein the non-planar upper surface is a concave surface.
8. The method of claim 1 , wherein the non-planar upper surface has a wave shape.
9. A method of forming a semiconductor device, the method comprising:
providing a substrate having a contact, the substrate comprising an integrated circuit;
forming a conductive pillar over and in electrical contact with the contact, the conductive pillar being non-planar;
forming a cap layer over a top surface of the conductive pillar; and
affixing solder material to the cap layer such that an inter-metallic compound (IMC) layer is interposed between the solder material and the cap layer, a thickness of the IMC layer being less than about a distance from an uppermost point of the top surface of the conductive pillar and a lowermost point of the top surface of the conductive pillar, wherein the distance between the uppermost point of the top surface and the lowermost point of top surface is about 6% of a width of the conductive pillar.
10. The method of claim 9 , wherein the non-planar upper surface is a convex surface.
11. A method of forming a semiconductor device, the method comprising:
providing a substrate having a contact;
forming a passivation layer over the substrate, at least a portion of the contact being exposed; and
forming a conductive pillar over and in electrical contact with the contact, the conductive pillar having a non-planar upper surface, wherein a distance between an uppermost point of the non-planar upper surface and a lowermost point of the non-planar upper surface is about 6% of a width of the conductive pillar.
12. The method of claim 11 , wherein the distance between an uppermost point of the non-planar upper surface and the lowermost point of the non-planar upper surface is greater than a thickness of an inter-metallic compound (IMC) layer overlying the conductive pillar.
13. The method of claim 11 , wherein the non-planar upper surface is a convex surface.
14. The method of claim 11 , wherein the non-planar upper surface is a concave surface.
15. The method of claim 11 , wherein the non-planar upper surface has a wave shape.
16. A method of forming a semiconductor device, the method comprising:
providing a substrate having a contact;
forming a conductive pillar over and in electrical contact with the contact, the conductive pillar having a non-planar upper surface;
forming a cap layer over a top surface of the conductive pillar; and
affixing solder material to the cap layer such that an inter-metallic compound (IMC) layer is interposed between the solder material and the cap layer, a thickness of the IMC layer being less than about a distance from an uppermost point of the top surface of the conductive pillar and a lowermost point of the top surface of the conductive pillar, wherein the distance between the uppermost point of the top surface and the lowermost point of top surface is about 6% of a width of the conductive pillar.
17. The method of claim 16 , wherein the non-planar upper surface has a wave shape.
18. The method of claim 16 , further comprising forming a capping layer over the conductive pillar, the capping layer comprising Ni, Pt, Au, or Ag.
19. A method of forming a semiconductor device, the method comprising:
providing a substrate having a contact, the substrate comprising an integrated circuit;
forming a passivation layer over the substrate, at least a portion of the contact being exposed; and
forming a conductive pillar over and in electrical contact with the contact, a central region of the conductive pillar having a non-planar upper surface;
wherein a distance between an uppermost point of the non-planar upper surface and the lowermost point of the non-planar upper surface is about 6% of a width of the conductive pillar.
20. A method of forming a semiconductor device, the method comprising:
providing a substrate having a contact, the substrate comprising an integrated circuit;
forming a conductive pillar over and in electrical contact with the contact, the conductive pillar having a non-planar upper surface;
forming a cap layer over a top surface of the conductive pillar; and
affixing solder material to the cap layer such that an inter-metallic compound (IMC) layer is interposed between the solder material and the cap layer, a thickness of the IMC layer being less than about a distance from an uppermost point of the top surface of the conductive pillar and a lowermost point of the top surface of the conductive pillar;
wherein the distance between the uppermost point of the top surface and the lowermost point of top surface is about 6% of a width of the conductive pillar.
21. The method of claim 9 , wherein the non-planar upper surface is a concave surface.
22. The method of claim 9 , wherein the non-planar upper surface is a wave-shaped surface.