Optical programmable matrix processor

1. A method for bit-matrix processing comprising:

performing at least one bit-matrix operation over at least one matrix using an optoelectronic bit matrix processor;

said performing at least one bit-matrix operation comprising:

replicating an input bit-matrix to obtain a replicated input bit-matrix,

performing bit-wise logical AND operations between said replicated input bit-matrix and a preloaded operator bit-matrix of bigger size to obtain an intermediate matrix; and

performing group-wise logical OR operations between groups of elements of said intermediate matrix after said performing bit-wise logical AND operations.

2. The method according to claim 1 , wherein at least one of said replicated input bit-matrix or said preloaded operator bit-matrix of bigger size is a vector.

3. The method according to claim 1 , further comprising:

selecting a replication factor and a group size of said group-wise logical OR according to a pre-selected size of at least one of said input-bit matrix, said replicated input bit-matrix, said preloaded operator bit-matrix of bigger size or said intermediate matrix and the bit-matrix operation.

4. The method according to claim 1 , further comprising encoding said input bit-matrix before said performing bit-wise logical AND operations.

5. The method according to claim 4 , wherein said encoding said input bit-matrix comprises dual rail encoding.

6. The method according to claim 1 , wherein said performing bit-wise logical AND operations is carried out using one or more optical elements.

7. A method for bit-matrix processing comprising:

performing, using an optoelectronic bit matrix processor, at least one bit-wise Boolean operation under at least two input matrices, by:

arranging input binary data in an operand matrix;

arranging data from a memory in an operator matrix in an optoelectronic device;

pre-setting a configuration of said operator matrix and dynamically loading said input binary data in said operand matrix; and

performing element-wise AND operations and group-wise OR Boolean operations between said operand matrix and said operator matrix to perform said bit-wise Boolean operation.

8. A method for bit-matrix processing comprising:

inputting binary input data to an optical source matrix;

loading data from a memory onto a spatial light modulator;

optically replicating data from said optical source matrix and projecting it onto said spatial light modulator according to a replication factor, thereby to perform bit-wise logical AND operations;

integrating light from said spatial light modulator onto a photodiode matrix, thereby to perform group-wise logical OR operations; and

processing an output signal from said photodiode matrix,

wherein said spatial light modulator has a pre-set physical size, and said optical source matrix has a fixed size on which corresponding binary input data of variable size is mapped.

9. The method according to claim 8 , further comprising encoding said binary input data.

10. The method according to claim 9 , wherein said encoding said binary input data includes dual rail encoding.

11. A bit-matrix processor comprising:

an input bit-matrix serving as an operand matrix;

an operator bit-matrix of larger or equal size than said input bit matrix;

a replicator for replicating said input bit-matrix onto said operator bit matrix;

hardware arranged to perform bit-wise logical AND operations between said replicated input bit-matrix and said operator bit-matrix to obtain a intermediate matrix, and to perform group-wise logical OR operations between groups of elements of said intermediate matrix after performing said bit-wise logical AND operations.

12. The bit-matrix processor according to claim 11 , wherein:

said operator bit-matrix includes an optoelectronic operator matrix;

said input bit-matrix includes an optoelectronic operand matrix; and

said hardware includes a memory controller for controlling processing flow and selecting at least one Boolean bit-wise logical operation to perform between parts of said operator matrix and said operand matrix for carrying out a desired matrix transform.

13. The processor according to claim 11 , further comprising

a memory coupled to said operator matrix and including preloaded content for performing said Boolean bit-wise logical operations; and

a memory controller for selecting content from said memory and loading it in said operator matrix;

a data controller coupled to said operand matrix for dynamically loading input data into said operand matrix.

14. The processor according to claim 11 , wherein:

said operand matrix is an optical source matrix for receiving input binary data;

said operator matrix is a passive optical replicator for replicating a pattern on said optical source matrix and projecting it onto a Spatial Light Modulator (SLM);

and further comprising:

a database loading device for loading data onto said SLM thereby to perform logical AND operations with said optical source matrix data;

an integrating device for integrating light from said SLM onto a photodiode matrix; and

an output signal processing device.

15. The processor according to claim 14 , further comprising a data encoder for encoding said input binary data onto said operand matrix.

16. The processor according to claim 11 , wherein all matrix elements are 1-bit representative of two levels of reflectivity and all logical elements are two-level devices, capable of resolving 0 and 1 logical levels of signal.