Flash memory and data erasing method of the same
View Patent ↗When data erasure of a flash memory is interrupted and restarted from the interrupted point, time required for the data erasure is shortened. A flash memory includes a memory cell(s), a verification circuit, and a power supply circuit. The verification circuit measures a threshold voltage of the memory cell(s) by verifying an erasure state of the memory cell(s). The power supply circuit applies, to the memory cell(s), one or more pulse voltages whose initial pulse voltage has a strength that corresponds to the measured threshold voltage.
1. A flash memory comprising:
at least one memory cell;
a verification circuit configured to measure threshold voltage of said at least one memory cell by verifying an erased state of said at least one memory cell; and
a power supply circuit configured to apply, to said at least one memory cell, one or more erase pulse voltages whose initial pulse voltage has a strength that corresponds to said threshold voltage.
2. The flash memory according to claim 1 , wherein said verification circuit is configured to measure said threshold voltage of said at least one memory cell by verifying an erased state of said at least one memory cell when data erasure is interrupted and restarted from the interrupted point.
3. The flash memory according to claim 1 , further comprising:
a register configured to record strength of a last pulse voltage applied to said at least one memory cell before the data erasure is interrupted; wherein
said power supply circuit is further configured to use, as an initial pulse voltage, said pulse voltage with said strength recorded in said register when the data erasure is restarted from the interrupted point.
4. A data erasing method of a flash memory, said method comprising:
measuring a threshold voltage of at least one memory cell by verifying an erasure state; and
applying, to said at least one memory cell, one or more erase pulse voltages whose initial pulse voltage has a strength that corresponds to said threshold voltage.
5. The data erasing method according to claim 4 , comprising said measuring and said applying when data erasure of a flash memory is interrupted and restarted from the interrupted point.
6. A flash memory comprising:
at least one memory cell;
a verification circuit configured to measure threshold voltage of said at least one memory cell by verifying an erased state of said at least one memory cell when data erasure is interrupted and restarted from the interrupted point; and
a power supply circuit configured to apply, to said at least one memory cell, one or more erase pulse voltages whose initial pulse voltage has a strength that corresponds to said measured threshold voltage.