IP Library › Granted Patent US 8,339,837
Granted Patent B2
US 8,339,837 · App. 13/206,547 · Granted Dec 25, 2012

Driving method of semiconductor device

Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,339,837
App. No.
13/206,547
Granted
Dec 25, 2012
Kind
B2
Abstract

A semiconductor device with a novel structure and a driving method thereof are provided. A semiconductor device includes a non-volatile memory cell including a writing transistor including an oxide semiconductor, a reading p-channel transistor including a semiconductor material different from that of the writing transistor, and a capacitor. Data is written to the memory cell by turning on the writing transistor so that a potential is supplied to a node where a source electrode of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor so that a predetermined amount of electric charge is held in the node. In a holding period, the memory cell is brought into a selected state and a source electrode and a drain electrode of the reading transistor are set to the same potential, whereby the electric charge stored in the node is held.

Claims (27)

1. A method for driving a semiconductor device, the semiconductor device comprising:

a first transistor, a second transistor, and a capacitor,

wherein one of source and drain of the first transistor and one of source and drain of the second transistor are electrically connected to a bit line,

wherein a gate of the second transistor is electrically connected to a write word line,

wherein the other of source and drain of the first transistor is electrically connected to a source line,

wherein one electrode of the capacitor is electrically connected to a write-read word line, and

wherein a gate of the first transistor, the other of source and drain of the second transistor, and the other electrode of the capacitor are electrically connected to each other to form a node where electric charge is held,

the method comprising the steps of:

supplying a potential at which the second transistor is turned on to the write word line, and supplying a ground potential to the source line in a writing period, thereby storing electric charge in the node; and

supplying a ground potential to the write word line and the write-read word line, and supplying a same potential to the source line and the bit line in a holding period after the writing period, thereby holding the electric charge in the node.

2. The method for driving a semiconductor device, according to claim 1 , wherein a ground potential is supplied to the source line and the bit line in the holding period.

3. The method for driving a semiconductor device, according to claim 1 , wherein a channel formation region of the second transistor comprises an oxide semiconductor.

4. The method for driving a semiconductor device, according to claim 1 , wherein the first transistor is a p-channel transistor.

5. A method for driving a semiconductor device comprising memory cells, each of the memory cells comprising:

a first transistor, a second transistor, and a capacitor,

wherein one of source and drain of the first transistor and one of source and drain of the second transistor are electrically connected to a bit line,

wherein a gate of the second transistor is electrically connected to a write word line,

wherein the other of source and drain of the first transistor is electrically connected to a source line,

wherein one electrode of the capacitor is electrically connected to a write-read word line, and

wherein a gate of the first transistor, the other of source and drain of the second transistor, and the other electrode of the capacitor are electrically connected to each other to form a node where electric charge is held,

the method comprising the steps of:

supplying a potential at which the second transistor is turned on to the write word line, and supplying a ground potential to the source line in a writing period, thereby storing electric charge in the node;

supplying a ground potential to the write word line and the write-read word line, and supplying a same potential to the bit line and the source line in a holding period after the writing period, thereby holding the electric charge in the node; and

supplying a power supply potential to the write-read word line connected to one of the memory cells in a non-selected state, and supplying a ground potential to the write-read word line connected to another one of the memory cells in a selected state in a reading period, thereby reading the electric charge held in the node in the memory cell in the selected state.

6. The method for driving a semiconductor device, according to claim 5 , wherein a ground potential is supplied to the source line and the bit line in the holding period.

7. The method for driving a semiconductor device, according to claim 5 , wherein a channel formation region of the second transistor comprises an oxide semiconductor.

8. The method for driving a semiconductor device, according to claim wherein the first transistor is a p-channel transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2011
From: INOUE, HIROKI; KATO, KIYOSHI; MATSUZAKI, TAKANORI; NAGATSUKA, SHUHEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 026726/0930 →
Priority Claims (2)
JP 2010-189587 · Aug 26, 2010 · national
JP 2011-005766 · Jan 14, 2011 · national
Continuity (1)
Related Publication 20120051116A1 · Mar 1, 2012