IP Library › Granted Patent US 8,354,888
Granted Patent B2
US 8,354,888 · App. 13/195,051 · Granted Jan 15, 2013

Power amplifier

Inventors: Takayuki Matsuzuka (Tokyo, JP); Kazuya Yamamoto (Tokyo, JP); Takao Moriwaki (Tokyo, JP)
Assignee: Mitsubishi Electric Corporation
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Quick Facts
Patent No.
US 8,354,888
App. No.
13/195,051
Granted
Jan 15, 2013
Kind
B2
Abstract

A power amplifier includes an input matching circuit, an amplifier transistor for amplifying an input signal received through the input matching circuit, an element for varying the collector voltage of the amplifier transistor, a bias circuit for varying the idle current in the amplifier transistor, and a compensation circuit for varying capacitance of the input matching circuit to maintain the phase shift and the input reflection in the power amplifier constant when the collector voltage and the idle current are varied, to prevent a decrease in the efficiency of the power amplifier due to changes in the output power of the amplifier transistor.

Claims (37)

1. A power amplifier comprising:

an input matching circuit having an input terminal and an output terminal;

an amplifier transistor for amplifying an input signal received through the input matching circuit and output at the output terminal of the input matching circuit;

means for varying a collector voltage applied to the amplifier transistor;

a bias circuit for varying an idle current flowing in the amplifier transistor; and

a compensation circuit including a first capacitor and a variable capacitance connected to the first capacitor, wherein the fist capacitor and the variable capacitance are connected to the output terminal of the input matching circuit, the compensation circuit varying capacitance at the output terminal of the input matching circuit to maintain phase shift and input reflection of the power amplifier constant when the collector voltage and the idle current vary, and to prevent a decrease in efficiency of the power amplifier due to changes in output power of the amplifier transistor.

2. The power amplifier according to claim 1 , further comprising a resistance connected in series with the first capacitor.

3. The power amplifier according to claim 2 , wherein the resistance is a variable resistance.

4. The power amplifier according to claim 2 , wherein the resistance is a semiconductor layer.

5. The power amplifier according to claim 1 , further comprising an inductor connected in series to the first capacitor.

6. The power amplifier according to claim 1 , further comprising an attenuator for attenuating the input signal.

7. A power amplifier comprising:

an input matching circuit having an input terminal and an output terminal;

an amplifier transistor for amplifying an input signal received through the input matching circuit and output at the output terminal of the input matching circuit;

means for varying a collector voltage applied to the amplifier transistor;

a bias circuit for varying an idle current flowing in the amplifier transistor; and

a compensation circuit consisting of two independently controllable variable capacitors connected to the output terminal of the input matching circuit, the compensation circuit varying capacitance at the output terminal of the input matching circuit to maintain phase shift and input reflection of the power amplifier constant when the collector voltage and the idle current vary, and to prevent a decrease in efficiency of the power amplifier due to changes in output power of the amplifier transistor.

8. The power amplifier according to claim 7 , further comprising:

two wire bonding pads, each bonding pad being connected to one of the two variable capacitors; and

a ground terminal, wherein the ground terminal is connected to at least one of the wire bonding pads.

9. A power amplifier wherein:

an input matching circuit having an input terminal and an output terminal;

an amplifier transistor for amplifying an input signal received through the input matching circuit and output at the output terminal of the input matching circuit;

means for varying a collector voltage applied to the amplifier transistor;

a bias circuit for varying an idle current flowing in the amplifier transistor; and

a compensation circuit including a first diode which can be reverse biased and a second diode for connecting and disconnecting the first diode to and from the output terminal of the input matching circuit, the compensation circuit varying capacitance at the output terminal of the input matching circuit to maintain phase shift and input reflection of the power amplifier constant when the collector voltage and the idle current vary, and to prevent a decrease in efficiency of the power amplifier due to changes in output power of the amplifier transistor.

10. A power amplifier comprising:

an input matching circuit having an input terminal and an output terminal;

an amplifier transistor for amplifying an input signal received through the input matching circuit and output at the output terminal of the input matching circuit;

means for varying a collector voltage applied to the amplifier transistor;

a bias circuit for varying an idle current flowing in the amplifier transistor; and

a compensation circuit including a first capacitor and two diodes which may be connected to and disconnected from the output terminal of the output matching circuit, the compensation circuit varying capacitance at the output terminal of the input matching circuit by use of the two diodes to maintain phase shift and input reflection of the power amplifier constant when the collector voltage and the idle current vary, and to prevent a decrease in efficiency of the power amplifier due to changes in output power of the amplifier transistor.

11. A power amplifier comprising:

an input matching circuit having an input terminal and an output terminal;

an amplifier transistor for amplifying an input signal received through the input matching circuit and output at the output terminal of the input matching circuit;

means for varying a collector voltage applied to the amplifier transistor;

a bias circuit for varying an idle current flowing in the amplifier transistor; and a compensation circuit including a first capacitor, a field effect transistor (FET) having a gate and a drain, connecting and disconnecting the first capacitor to and from the output terminal of the input matching circuit, and a second capacitor connected between the gate and the drain of the FET, the compensation circuit varying capacitance at the output terminal of the input matching circuit to maintain phase shift and input reflection of the power amplifier constant when the collector voltage and the idle current vary, and to prevent a decrease in efficiency of the power amplifier due to changes in output power of the amplifier transistor.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 4, 2017
From: MITSUBISHI ELECTRIC CORPORATION
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 040839/0688 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 11, 2011
From: MATSUZUKA, TAKAYUKI; YAMAMOTO, KAZUYA; MORIWAKI, TAKAO
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 026734/0379 →
Priority Claims (1)
JP 2010-276654 · Dec 13, 2010 · national
Continuity (1)
Related Publication 20120146733A1 · Jun 14, 2012