Apparatus and method for dividing liquid crystal display device
An apparatus and method for driving a Liquid Crystal Display (LCD) device are disclosed. The apparatus includes a liquid crystal panel in which a plurality of subpixels arranged on each horizontal line are commonly connected to at least one adjacent data line, and on at least one horizontal line basis, a plurality of subpixels are connected to at least one adjacent data line through Thin Film Transistors (TFTs) of the subpixels from a same direction with respect to the at least one adjacent data line, a data driver for driving a plurality of data lines, a gate driver for driving a plurality of gate lines, and a timing controller for arranging externally received image data according to arrangement of subpixel columns commonly connected to each data line, providing the arranged image data to the data driver, and controlling driving timings of the gate driver and the data driver.
1. An apparatus for driving a Liquid Crystal Display (LCD) device, comprising:
a liquid crystal panel in which a plurality of subpixels arranged on each horizontal line are commonly connected to at least one adjacent data line, and on at least one horizontal line basis, a plurality of subpixels are connected to at least one adjacent data line through Thin Film Transistors (TFTs) of the subpixels from a same direction with respect to the at least one adjacent data line;
a data driver for driving a plurality of data lines;
a gate driver for driving a plurality of gate lines; and
a timing controller for arranging externally received image data according to arrangement of subpixel columns commonly connected to each data line, providing the arranged image data to the data driver, and controlling driving timings of the gate driver and the data driver,
wherein odd-numbered data lines among the plurality of data lines are branched to be connected to TFTs of the subpixels of ( 4 k - 3 ) th and ( 4 k - 1 ) th columns so that the subpixels of ( 4 k - 3 ) th and ( 4 k - 1 ) th columns are connected in parallel to the same data lines, even-numbered data lines among the plurality of data lines are branched to be connected to TFTs of the subpixels of ( 4 k - 2 ) th and 4 k th columns so that the subpixels of ( 4 k - 2 ) th and 4 k th columns are connected in parallel to the same data lines,
wherein the k being a natural number larger than 1, and
wherein, in a period for displaying an image on at least one frame basis, the timing controller controls an image to be displayed at the same time at pixels of the ( 4 k - 3 ) th and 4 k - 2 ) th columns during at least one half of a horizontal period or during one horizontal period and controls an image to be displayed at the same time at pixels of ( 4 k - 1 ) th and 4 k th columns during the other half of the horizontal period or during a next horizontal period.
2. The apparatus according to claim 1 , wherein in the liquid crystal panel, a plurality of subpixels of a same color are arranged along each of the gate lines, a plurality of subpixels of three colors are arranged along each of the data lines, subpixels of ( 4 k - 3 ) th and 4 k - 1 ) th columns are commonly connected to a same data line, and subpixels of ( 4 k - 2 ) th and 4 k th columns are commonly connected to a same data line.
3. The apparatus according to claim 2 , wherein the subpixels of ( 4 k - 3 ) th and ( 4 k - 2 ) th columns are connected to odd-numbered gate lines, and the subpixels of ( 4 k - 1 ) th and 4 k th columns are connected to even-numbered gate lines.
4. The apparatus according to claim 1 , wherein in the liquid crystal panel, a plurality of subpixels of a same color are arranged along each of the gate lines, a plurality of subpixels of three colors are arranged along each of the data lines, subpixels of ( 4 k - 3 ) th and ( 4 k - 1 ) th columns in each odd-numbered row are commonly connected to a same data line, subpixels of ( 4 k - 2 ) th and 4 k th columns in each odd-numbered row are commonly connected to a same data line, subpixels of the ( 4 k - 2 ) th and 4 k th columns in each even-numbered row are commonly connected to a same data line, and subpixels of the ( 4 k - 3 ) th and ( 4 k - 1 ) th columns in each even-numbered row are commonly connected to a same data line.
5. The apparatus according to claim 4 , wherein the subpixels of the ( 4 k - 3 ) th and ( 4 k - 2 ) th columns in each odd-numbered row are connected to odd-numbered gate lines, the subpixels of the ( 4 k - 1 ) th and 4 k th columns in each odd-numbered row are connected to even-numbered gate lines, the subpixels of the ( 4 k - 2 ) th and ( 4 k - 1 ) th columns in each even-numbered row are connected to the odd-numbered gate lines, the subpixels of the ( 4 k - 3 ) th and 4 k th columns in each even-numbered row are connected to the even-numbered gate lines.
6. The apparatus according to claim 5 , wherein in a period for displaying an image on at least one frame basis, the timing controller controls an image to be displayed at pixels of the ( 4 k - 3 ) th and ( 4 k - 2 ) th columns during an odd-numbered horizontal period or during one half of the odd-numbered horizontal period and controls an image to be displayed at pixels of ( 4 k - 1 ) th and 4 k th columns during the other half of the odd-numbered horizontal period or during one horizontal period, and
wherein during the period for displaying an image on at least one frame basis, the timing controller controls an image to be displayed at the pixels of the ( 4 k - 2 ) th and ( 4 k - 1 ) th columns during an even-numbered horizontal period or during one half of the even-numbered horizontal period and controls an image to be displayed at the pixels of ( 4 k - 3 ) th and 4 k th columns during the other half of the even-numbered horizontal period or during one horizontal period.
7. A method for driving a Liquid Crystal Display (LCD) device having a liquid crystal panel in which a plurality of subpixels arranged on each horizontal line are commonly connected to at least one adjacent data line, and on at least one horizontal line basis, a plurality of subpixels are connected to at least one adjacent data line through Thin Film Transistors (TFTs) of the subpixels from a same direction with respect to the at least one adjacent data line, the method comprising:
driving a plurality of data lines;
driving a plurality of gate lines; and
arranging externally received image data according to arrangement of subpixel columns commonly connected to each data line, and controlling a driving timing of the data lines, so that the arranged image data are displayed at the subpixels through the plurality of data lines,
wherein the controlling of the driving timing data lines comprises controlling an image to be displayed at pixels of the ( 4 k - 3 ) th and ( 4 k - 2 ) th columns during an odd-numbered horizontal period or during one half of the odd-numbered horizontal period in a period for displaying an image on at least one frame basis, controlling an image to be displayed at pixels of ( 4 k - 1 ) th and 4 k th columns during the other half of the odd-numbered horizontal period or during one horizontal period in the period for displaying an image on at least one frame basis,
wherein the k being a natural number larger than 1, and
wherein the controlling of the driving timing of the data lines comprises controlling an image to be displayed at the same time at pixels of the ( 4 k - 3 ) th and ( 4 k - 2 ) th columns during at least one half of a horizontal period or during one horizontal period in a period for displaying an image on at least one frame basis, and controlling an image to be displayed at the same time at pixels of ( 4 k - 1 ) th and 4 k th columns during the other half of the horizontal period or during a next horizontal period in the period for displaying an image on at least one frame basis.