IP Library › Granted Patent US 8,415,667
Granted Patent B2
US 8,415,667 · App. 12/957,434 · Granted Apr 9, 2013

Semiconductor device

Inventors: Shunpei Yamazaki (Setagaya, JP); Daisuke Kawae (Kisarazu, JP); Hiromichi Godo (Isehara, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 8,415,667
App. No.
12/957,434
Granted
Apr 9, 2013
Kind
B2
Abstract

One object is to provide a p-channel transistor including an oxide semiconductor. Another object is to provide a complementary metal oxide semiconductor (CMOS) structure of an n-channel transistor including an oxide semiconductor and a p-channel transistor including an oxide semiconductor. A p-channel transistor including an oxide semiconductor includes a gate electrode layer, a gate insulating layer, an oxide semiconductor layer, and a source and drain electrode layers in contact with the oxide semiconductor layer. When the electron affinity and the band gap of an oxide semiconductor used for the oxide semiconductor layer in the semiconductor device, respectively, are χ (eV) and E g (eV), the work function (φ m ) of the conductor used for the source electrode layer and the drain electrode layer satisfies φ m >χ+E g /2 and the barrier for holes (φ Bp ) represented by (χ+E g −φ m ) is less than 0.25 eV.

Claims (39)

1. A semiconductor device comprising a transistor, the transistor comprising:

an oxide semiconductor layer;

a gate electrode layer adjacent to the oxide semiconductor layer;

a gate insulating layer interposed between the oxide semiconductor layer and the gate electrode layer; and

a source electrode layer in contact with the oxide semiconductor layer and a drain electrode layer in contact with the oxide semiconductor layer,

wherein a work function (φ m ) of a conductor used for the source electrode layer and the drain electrode layer satisfies φ m >χ+E g /2,

wherein a barrier for holes (φ Bp ) represented by (χ+E g −φ m ) is less than 0.25 eV, and

wherein an electron affinity of an oxide semiconductor used for the oxide semiconductor layer is represented by χ (eV) and a band gap of the oxide semiconductor used for the oxide semiconductor layer is represented by E g (eV).

2. The semiconductor device according to claim 1 , wherein the conductor is a metal oxide.

3. A semiconductor device comprising a transistor, the transistor comprising:

an oxide semiconductor layer including at least one of indium, gallium, and zinc;

a gate electrode layer adjacent to the oxide semiconductor layer;

a gate insulating layer interposed between the oxide semiconductor layer and the gate electrode layer; and

a source electrode layer in contact with the oxide semiconductor layer and a drain electrode layer in contact with the oxide semiconductor layer,

wherein a work function (φ m ) of a conductor used for the source electrode layer and the drain electrode layer satisfies φ m >χ+E g /2,

wherein a barrier for holes (φ Bp ) represented by (χ+E g −φ m ) is less than 0.25 eV, and

wherein an electron affinity of an oxide semiconductor used for the oxide semiconductor layer is represented by χ (eV) and a band gap of the oxide semiconductor used for the oxide semiconductor layer is represented by E g (eV).

4. The semiconductor device according to claim 3 , wherein the conductor is a metal oxide.

5. A semiconductor device comprising a p-channel transistor and an n-channel transistor,

the p-channel transistor comprising:

a first oxide semiconductor layer;

a first gate electrode layer adjacent to the first oxide semiconductor layer;

a first gate insulating layer interposed between the first oxide semiconductor layer and the first gate electrode layer; and

a first source electrode layer in contact with the first oxide semiconductor layer and a first drain electrode layer in contact with the first oxide semiconductor layer,

the n-channel transistor comprising:

a second oxide semiconductor layer;

a second gate electrode layer adjacent to the second oxide semiconductor layer;

a second gate insulating layer interposed between the second oxide semiconductor layer and the second gate electrode layer; and

a second source electrode layer in contact with the second oxide semiconductor layer and a second drain electrode layer in contact with the second oxide semiconductor layer,

wherein a work function (φ m1 ) of a first conductor used for the first source electrode layer and the first drain electrode layer satisfies φ m1 >χ 1 +E g1 /2,

wherein a barrier for holes (φ Bp1 ) represented by (χ 1 +E g1 −φ m1 ) is less than 0.25 eV, and

wherein an electron affinity of a first oxide semiconductor used for the first oxide semiconductor layer is represented by χ 1 (eV) and a band gap of the first oxide semiconductor used for the first oxide semiconductor layer is represented by E g1 (eV).

6. The semiconductor device according to claim 5 ,

wherein the first conductor is a metal oxide, and

wherein a second conductor used for the second source electrode layer and the second drain electrode layer is metal.

7. The semiconductor device according to claim 5 ,

wherein the first oxide semiconductor layer and the second oxide semiconductor layer include at least one of indium, gallium, and zinc.

8. The semiconductor device according to claim 5 ,

wherein the first oxide semiconductor used for the first oxide semiconductor layer and a second oxide semiconductor used for the second oxide semiconductor layer are formed using a same material.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 1, 2010
From: YAMAZAKI, SHUNPEI; KAWAE, DAISUKE; GODO, HIROMICHI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 025404/0479 →
Priority Claims (1)
JP 2009-276274 · Dec 4, 2009 · national
Continuity (1)
Related Publication 20110133178A1 · Jun 9, 2011