Digital fractional integrator

1. A method for fractional digital integration of an input signal, the input signal comprising a time series of numerical values, the method comprising:

applying the input signal time series to one input of a two-input summer at a time i;

providing an output of the summer to a delay register at time i;

providing an output of the delay register from time i−1 to a two-input multiplier;

providing an output of the multiplier to the summer at time i;

using a resettable counter to determine a value i and index a lookup table with i to provide the indexed value of the lookup table as an input to the multiplier; and

obtaining an output signal time series from the output of the summer.

2. The method of claim 1 , wherein the lookup table stores a plurality of values h i indexed by i.

3. The method of claim 2 , wherein the values of h i are pre-computed filter coefficients.

4. The method of claim 3 , wherein the pre-computed filter coefficients h i for integral order α are determined by the equation:

h

i

=

{

0

for

⁢

⁢

i

=

0

α

+

i

-

1

i

for

⁢

⁢

i

>

0

}

.

5. An apparatus for fractional digital integration of an input signal, the input signal comprising a time series of numerical values, the apparatus comprising:

means for applying the input signal time series to one input of a two-input summer at a time i;

means for providing an output of the summer to a delay register at time i;

means for providing an output of the delay register from time i−1 to a two-input multiplier;

means for providing an output of the multiplier to the summer at time i;

means for using a resettable counter to determine a value i and index a lookup table with i to provide the indexed value of the lookup table as an input to the multiplier; and

means for obtaining an output signal time series from the output of the summer.

6. The apparatus of claim 5 , wherein the lookup table is configured to store a plurality of values h i indexed by i.

7. The apparatus of claim 6 , wherein the values of h i are pre-computed filter coefficients.

8. The apparatus of claim 7 , wherein the pre-computed filter coefficients h i for integral order α are determined by the equation:

h

i

=

{

0

for

⁢

⁢

i

=

0

α

+

i

-

1

i

for

⁢

⁢

i

>

0

}

.

9. A fractional digital integrator configured for fractional digital integration of an input signal comprising a time series of numerical values, the integrator comprising:

a two-input summer configured to receive the input signal time series at one of its inputs at a time i;

a delay register configured to receive an output of the summer at time i;

a two-input multiplier configured to receive an output of the delay register from time i−1 at time i at one of its inputs;

the second of the inputs of the summer configured to receive an output of the multiplier at time i;

a resettable counter configured to determine a value i and index a lookup table with i to provide an indexed value of the lookup table as a second input to the multiplier; and

the output of the summer configured to provide an output signal time series.

10. The integrator of claim 9 , wherein the lookup table is configured to store a plurality of values h i indexed by i.

11. The integrator of claim 10 , wherein the values of h i are pre-computed filter coefficients.

12. The method of claim 11 , wherein the pre-computed filter coefficients h i for integral order α are determined by the equation:

h

i

=

{

0

for

⁢

⁢

i

=

0

α

+

i

-

1

i

for

⁢

⁢

i

>

0

}

.