Field effect transistor and method of manufacturing the same
The present invention has an object to provide an FET and a method of manufacturing the FET that are capable of increasing the threshold voltage as well as decreasing the on-resistance. The FET of the present invention includes a first undoped GaN layer; a first undoped AlGaN layer formed on the first undoped GaN layer, having a band gap energy greater than that of the first undoped GaN layer; a second undoped GaN layer formed on the first undoped AlGaN layer; a second undoped AlGaN layer formed on the second undoped GaN layer, having a band gap energy greater than that of the second undoped GaN layer; a p-type GaN layer formed in the recess of the second undoped AlGaN layer; a gate electrode formed on the p-type GaN layer; and a source electrode and a drain electrode which are formed in both lateral regions of the gate electrode, wherein a channel is formed at the heterojunction interface between the first undoped GaN layer and the first undoped AlGaN layer.
1. A junction field effect transistor comprising:
a first nitride semiconductor layer;
a second nitride semiconductor layer formed on said first nitride semiconductor layer, said second nitride semiconductor layer having a band gap energy greater than a band gap energy of said first nitride semiconductor layer;
a third nitride semiconductor layer formed on said second nitride semiconductor layer;
a fourth nitride semiconductor layer formed on said third nitride semiconductor layer, said fourth nitride semiconductor layer having a band gap energy greater than a band gap energy of said third nitride semiconductor layer;
a fifth semiconductor layer formed in a recess provided in said third nitride semiconductor layer and said fourth nitride semiconductor layer;
a gate electrode formed on said fifth semiconductor layer; and
a source electrode and a drain electrode which are formed in respective regions near lateral sides of said gate electrode, wherein:
a channel is formed at a heterojunction interface between said first nitride semiconductor layer and said second nitride semiconductor layer, and
said fifth semiconductor layer is in contact with said third nitride semiconductor layer at an inner side surface of said recess.
2. The junction field effect transistor according to claim 1 , wherein the recess penetrates through a heterojunction interface between said third nitride semiconductor layer and said fourth nitride semiconductor layer.
3. The junction field effect transistor according to claim 2 , wherein:
the recess penetrates through said third nitride semiconductor layer and said fourth nitride semiconductor layer to reach a surface of said second nitride semiconductor layer, and
the surface of said second nitride semiconductor layer as a bottom surface of the recess is flush with an interface between said second nitride semiconductor layer and said third nitride semiconductor layer.
4. The junction field effect transistor according to claim 1 , said fifth semiconductor layer has a sixth nitride semiconductor layer thereunder.
5. The junction field effect transistor according to claim 1 , wherein a difference in lattice constants between said second nitride semiconductor layer and said sixth nitride semiconductor layer is less than a difference in lattice constants between said second nitride semiconductor layer and said fifth semiconductor layer.
6. The junction field effect transistor according to claim 3 , further comprising:
a seventh nitride semiconductor layer of a first conductivity type formed on said fourth nitride semiconductor layer; and
an eighth nitride semiconductor layer of a first conductivity type formed on said seventh nitride semiconductor layer, said eighth nitride semiconductor layer having a band gap energy greater than a band gap energy of said seventh nitride semiconductor layer.
7. The junction field effect transistor according to claim 6 , wherein said source electrode and said drain electrode each of which is in contact with the heterojunction interface between said first nitride semiconductor layer and said second nitride semiconductor layer, and with the heterojunction interface between said third nitride semiconductor layer and said fourth nitride semiconductor layer.
8. The junction field effect transistor according to claim 7 , wherein:
said first nitride semiconductor layer includes GaN,
said second nitride semiconductor layer is composed of Al x Ga 1-x N (0<x≦1),
said third nitride semiconductor layer is composed of Al y Ga 1-y N (0≦y≦1),
said fourth nitride semiconductor layer is composed of Al z Ga 1-z N (0≦z≦1), and
said fifth semiconductor layer is composed of Al α Ga 1-α N (0≦α≦1).
9. The junction field effect transistor according to claim 8 , wherein said junction field effect transistor is a normally-off transistor.
10. The junction field effect transistor according to claim 1 , wherein:
said first nitride semiconductor layer includes GaN, said second nitride semiconductor layer is composed of Al x Ga 1-x N (0<x≦1),
said third nitride semiconductor layer is composed of Al y Ga 1-y N (0≦y≦1),
said fourth nitride semiconductor layer is composed of Al z Ga 1-z N (0≦z≦1), and
said fifth semiconductor layer is composed of Al x Ga 1-α N (0≦α≦1).
11. The junction field effect transistor according to claim 1 , wherein said junction field effect transistor is a normally-off transistor.
12. The junction field effect transistor according to claim 1 , wherein:
the first nitride semiconductor layer has an impurity of a first conductivity type,
the second nitride semiconductor layer has an impurity of a first conductivity type,
the third nitride semiconductor layer has an impurity of a first conductivity type,
the fourth nitride semiconductor layer has an impurity of a first conductivity type, and
the fifth semiconductor layer has an impurity of a second conductivity type.
13. The junction field effect transistor according to claim 1 , wherein said fifth semiconductor layer is in contact with a surface of said fourth nitride semiconductor layer.
14. A junction field effect transistor comprising:
a first nitride semiconductor layer;
a second nitride semiconductor layer formed on said first nitride semiconductor layer, said second nitride semiconductor layer having a band gap energy greater than a band gap energy of said first nitride semiconductor layer;
a third nitride semiconductor layer formed on said second nitride semiconductor layer;
a fourth nitride semiconductor layer formed on said third nitride semiconductor layer, said fourth nitride semiconductor layer having a band gap energy greater than a band gap energy of said third nitride semiconductor layer;
a fifth semiconductor layer formed in a recess provided in said third nitride semiconductor layer and said fourth nitride semiconductor layer;
a gate electrode formed on said fifth semiconductor layer;
a source electrode and a drain electrode which are formed in respective regions near lateral sides of said gate electrode; and
a sixth nitride semiconductor layer formed between said second nitride semiconductor layer and said fifth semiconductor layer, wherein:
a channel is formed at a heterojunction interface between said first nitride semiconductor layer and said second nitride semiconductor layer,
said sixth nitride semiconductor layer is in contact with an inner side surface of said recess and a surface of said fourth nitride semiconductor layer, and
a side portion of said sixth nitride semiconductor layer extends closer to said source electrode than a side portion of said fifth semiconductor layer, said side portion of said sixth nitride semiconductor layer and said side portion of said fifth semiconductor layer facing said source electrode.
15. The junction field effect transistor according to claim 14 ,
wherein the fifth semiconductor layer is thicker than the sixth semiconductor layer.
16. The junction field effect transistor according to claim 14 ,
wherein a portion of the sixth semiconductor layer at a bottom portion of the recess has a substantially same thickness of a portion of the sixth semiconductor layer on a surface of the fourth nitride semiconductor layer.
17. The junction field effect transistor according to claim 14 ,
wherein said source electrode and said drain electrode penetrate through said sixth nitride semiconductor layer.
18. The junction field effect transistor according to claim 14 , wherein:
the fifth semiconductor layer has an impurity of a second conductivity type, and
the sixth nitride semiconductor layer has an impurity of a second conductivity type.