IP Library Granted Patent US 8,470,190
Granted Patent B2
US 8,470,190 · App. 12/173,925 · Granted Jun 25, 2013

Method for processing portions of walls of an opening formed in a silicon substrate

Inventors: Edgard Jeanne (Saint Cyr sur Loire, FR); Sylvain Nizou (Noizay, FR)
Assignee: STMicroelectronics S.A.
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Quick Facts
Patent No.
US 8,470,190
App. No.
12/173,925
Granted
Jun 25, 2013
Kind
B2
Abstract

A method for processing at least one wall of an opening formed in a silicon substrate, successively including the steps of implanting fluorine atoms into an upper portion of the wall of the opening, performing an oxidization step, and applying a specific processing to at least a portion of the non-implanted portion of the opening.

Claims (28)

1. A method for processing at least one wall of an opening formed in a silicon substrate, successively comprising the steps of:

(a) implanting fluorine atoms into an upper portion of the wall of the opening;

(b) performing an oxidization of the wall of the opening; and

(c) etching at least a portion of a non-implanted portion of the wall of the opening or implanting a dopant therein, wherein the non-implanted portion of the wall of the opening is located below the upper portion of the wall of the opening, wherein step (a) is preceded by the steps of:

forming an oxide layer on the opening wall;

implanting dopants into the oxide layer at the level of said upper portion of the wall and at the level of an intermediary portion of the wall located under the upper portion of the wall, the dopants being selected from the group consisting of boron, phosphorus and arsenic; and

removing the oxide which has been doped at the level of the upper and intermediary portions of the wall.

2. The method of claim 1 , wherein step (c) comprises implanting the dopant into said upper portion of the wall and into an intermediary portion of the wall located under the upper portion of the wall, the dopant being selected from the group consisting of boron, phosphorus, and arsenic.

3. The method of claim 1 , wherein step (c) comprises the steps of deoxidizing at least an intermediary portion of the wall located under said upper portion of the wall, and then implanting the dopant into the intermediary portion of the wall, the dopant being selected from the group consisting of boron, phosphorus, and arsenic.

4. The method of claim 1 , wherein step (c) comprises the steps of deoxidizing at least an intermediary portion of the wall located under the upper portion of the wall, and then etching, in the opening, the silicon substrate unprotected by oxide.

5. The method of claim 1 , wherein step (c) is followed by a step of total deoxidation of the opening.

6. The method of claim 1 , wherein the implanting of the dopant and of fluorine atoms are implantations oblique with respect to the direction of the opening.

7. The method of claim 1 , wherein the opening does not cross the substrate.

8. A method for processing a silicon substrate, comprising:

forming at least one vertical opening in the substrate, the substrate having a wall;

implanting fluorine into the wall of the opening to a first vertical depth to form a first wall region;

oxidizing the wall of the vertical opening in the first wall region and in a second wall region having a greater vertical depth than the first wall region, wherein the implanted first wall region and the second wall region of the vertical opening are oxidized; and

processing the second wall region of the vertical opening, wherein implanting fluorine into the wall of the vertical opening is preceded by forming an oxide layer on the wall of the vertical opening and implanting dopants into the oxide layer to a second vertical depth greater than the first vertical depth, wherein processing the second wall region of the vertical opening comprises processing the wall of the vertical opening between the first and second vertical depths.

9. A method as defined in claim 8 , wherein fluorine is implanted into the wall of the vertical opening at an oblique angle with respect to the vertical opening, the oblique angle selected to implant fluorine into the wall of the vertical opening to the first vertical depth.

10. A method as defined in claim 8 , wherein processing the second wall region of the vertical opening comprises implanting dopants into the second wall region.

11. A method as defined in claim 8 , wherein processing the second wall region of the vertical opening comprises etching the second wall region.

12. A method as defined in claim 8 , wherein implanting fluorine is preceded by removing the doped oxide layer to the second vertical depth.

13. A method as defined in claim 8 , wherein processing the second wall region of the vertical opening comprises implanting dopants into the first wall region and into the second wall region, the dopants including at least one of boron, phosphorus and arsenic.

14. A method as defined in claim 8 , wherein processing the second wall region of the vertical opening comprises deoxidizing at least the second wall region and then implanting dopants into the second wall region.

15. A method as defined in claim 8 , wherein processing the second wall region of the vertical opening comprises deoxidizing the second wall region and then etching the silicon substrate in the second wall region.

16. A method as defined in claim 8 , wherein processing the second wall region of the vertical opening is followed by total deoxidation of the vertical opening.

17. A method as defined in claim 8 , wherein forming at least one vertical opening comprises forming a vertical opening through the substrate.

18. A method as defined in claim 8 , wherein forming at least one vertical opening comprises forming a vertical opening of limited depth having a bottom.

Assignments (2)
CHANGE OF NAME Recorded Jan 21, 2024
From: STMICROELECTRONICS SA
To: STMICROELECTRONICS FRANCE
Reel/Frame 066357/0639 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2008
From: JEANNE, EDGARD; NIZOU, SYLVAIN
To: STMICROELECTRONICS S.A.
Reel/Frame 021242/0860 →
Priority Claims (1)
FR 07 56571 · Jul 18, 2007 · national
Continuity (1)
Related Publication 20100003573A1 · Jan 7, 2010