Method for forming an integrated circuit level by sequential tridimensional integration
A method for forming a level of a tridimensional structure on a first support in which components are formed, including the steps of forming, on a second semiconductor support, a single-crystal semiconductor substrate with an interposed thermal oxide layer; placing the free surface of the single-crystal semiconductor substrate on the upper surface of the first support; eliminating the second semiconductor support; and thinning down the thermal oxide layer down to a thickness capable of forming a gate insulator.
1. A method for forming a level of insulated gate of a tridimensional structure on a first support in which components are formed, comprising the steps of:
forming, on a semiconductor support, a single-crystal semiconductor substrate with an interposed thermal oxide layer;
placing a free surface of the single-crystal semiconductor substrate on an upper surface of the first support;
eliminating the semiconductor support; and
thinning down the thermal oxide layer down to a thickness between 3 and 15 nm;
forming, on the thinned down thermal oxide layer, a conductive layer; and
etching the conductive layer and the thermal oxide layer to form insulated gates.
2. The method of claim 1 , wherein the thermal oxide layer is thinned down by means of an ion beam based on atomic clusters.
3. The method of claim 1 , wherein the thermal oxide layer is thinned down by means of an ion beam based on monomers.
4. The method of claim 1 , wherein the free surface of the single-crystal semiconductor substrate is bonded to the first support by molecular bonding.
5. The method of claim 1 , wherein the semiconductor support is eliminated by a combination of a chemical-mechanical polishing and of a wet etch.
6. The method of claim 1 , wherein the thermal oxide layer belongs to a dielectric multiple-layer stack.
7. The method of claim 1 , wherein the single-crystal semiconductor substrate is made of silicon.
8. The method of claim 6 , wherein the dielectric multiple-layer stack comprises an oxide-nitride-oxide stack.