IP Library Granted Patent US 8,492,772
Granted Patent B2
US 8,492,772 · App. 12/402,551 · Granted Jul 23, 2013

Homoepitaxial growth of SiC on low off-axis SiC wafers

Inventors: Alexandre Ellison (Linköping, SE); Christer Hallin (Linköping, SE); Björn Magnusson (Linköping, SE); Peder Bergman (Linköping, SE)
Assignee: Norstel AB
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Quick Facts
Patent No.
US 8,492,772
App. No.
12/402,551
Granted
Jul 23, 2013
Kind
B2
Abstract

A wafer including a SiC substrate having a surface that is inclined relative to a (0001) basal plane at an angle higher than 0.1 degree but less than 1 degree, a SiC homoepitaxial device layer, and a SiC homoepitaxial boundary layer having a thickness up to 1 μm arranged between the substrate and the device layer. The boundary layer has been grown on the substrate under an atmosphere of lower supersaturation than when forming the device layer and at a C/Si ratio above 1.

Claims (26)

1. An SiC wafer produced according to a method comprising:

growing SiC homoepitaxial layers on a surface of an SiC substrate, wherein the layers have a same polytype as the substrate, and wherein the surface is inclined relative to a (0001) basal plane at an angle higher than 0.1 degree but less than 1 degree;

starting an homoepitaxial growth by forming a boundary layer with a thickness up to 1 μm; and

forming a homoepitaxial device layer wherein the boundary layer is formed in an atmosphere of lower supersaturation than when forming the homoepitaxial device layer and at a C/Si ratio above 1, such that the homoepitaxial device layer has a density of surface defects that is less than 2 cm −2 .

2. The SiC wafer according to claim 1 , wherein an off-axis angle is between 0.1 and 0.4 degrees along either a <11 2 0> direction or a <01 1 0> direction or any direction between said directions.

3. The SiC wafer according to claim 1 , wherein a width of the device structure along an off-axis direction is smaller than the length of the device structure along a direction perpendicular to the off-axis direction.

4. The SiC wafer according to claim 1 , wherein in boundary layer minority carriers have been reduced by an introduction during epitaxial growth, or after epitaxial growth, of deep levels acting as lifetime killers using either transition metals doping, or intrinsic in-grown defects or ex-situ generated intrinsic defects by electron or proton irradiation techniques.

5. A wafer, comprising:

a SiC substrate having a surface that is inclined relative to a (0001) basal plane at an angle higher than 0.1 degree but less than 1 degree;

a SiC homoepitaxial device layer; and

a SiC homoepitaxial boundary layer having a thickness up to 1 μm arranged between the substrate and the device layer, wherein the boundary layer has been grown on the substrate under an atmosphere of lower supersaturation than when forming the device layer and at a C/Si ratio above 1, wherein the homoepitaxial device layer has a density of surface defects that is less than 2 cm −2 .

6. The wafer according to claim 5 , wherein an off-axis direction is chosen along any one from the group of:

one of the 6 equivalent <11 2 0> directions, or

one of the 6 equivalent <01 1 0> directions.

7. The wafer according to claim 5 , wherein an off-axis is chosen along: between one of the equivalent <11 2 0> directions and one of the 6 equivalent <01 1 0> directions.

8. The wafer according to claim 7 , wherein the off-axis direction is within the (0001) plane at an angle between 10 and 20 degrees of one of the equivalent <11 2 0> directions.

9. The wafer according to claim 5 , further comprising:

an epitaxied bipolar device structure comprising a low doped drift layer; and

a buffer layer between the boundary layer and the low doped drift layer, wherein a thickness of the buffer layer is at least equal to the tangent of the off-axis angle between the wafer surface and the (0001) basal plane times the width of the device along an off-axis direction.

10. The wafer according to claim 9 , wherein the off-axis angle is between 0.1 and 0.4 degrees along either the <11 2 0> or the <01 1 0> or any direction between the directions, and wherein the thickness of the buffer layer is greater than 16 microns.

11. The wafer according to claim 9 , wherein the width of the device structure along the off-axis direction is smaller than the length of the device structure along the direction perpendicular to the off-axis direction.

12. An SiC wafer, comprising:

an Sic substrate;

SiC homoepitaxial layers on a surface of the SiC substrate, wherein the layers have a same polytype as the substrate, and wherein the surface of the substrate is inclined relative to a (0001) basal plane at an angle higher than 0.1 degree but less than 1 degree;

a boundary layer having a thickness up to 1 μm; and

a homoepitaxial device layer having a density of surface defects that is less than 2 cm −2 .

Assignments (3)
CHANGE OF NAME Recorded Sep 14, 2020
From: NORSTEL AKTIEBOLAG
To: STMICROELECTRONICS SILICON CARBIDE AB
Reel/Frame 053764/0605 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNMENT RECORDED IN INCORRECT APPLICATION - REMOVE FROM 12402072 PREVIOUSLY RECORDED ON REEL 022736 FRAME 0434. ASSIGNOR(S) HEREBY CONFIRMS THE TO BE RECORDED IN 12402551. Recorded Jun 25, 2013
From: ELLISON, ALEXANDRE; HALLIN, CHRISTER; MAGNUSSON, BJORN; BERGMAN, PEDER
To: NORSTEL AB
Reel/Frame 030681/0434 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2009
From: ELLISON, ALEXANDRE; HALLIN, CHRISTER; MAGNUSSON, BJORN; BERGMAN, PEDER
To: NORSTEL AB
Reel/Frame 022736/0434 →
Continuity (3)
Continuation 11180611 · Jul 14, 2005
Provisional Application 60588806 · Jul 19, 2004
Related Publication 20090230406A1 · Sep 17, 2009