Buck regulator structure comprising high-side and low-side voltage HEMT transistors
A semiconductor device includes a high-side field-effect transistor including a high-side drain electrode, a high-side gate electrode, and a high-side source electrode; and a first low-side field-effect transistor including a first low-side drain electrode, a first low-side gate electrode and a first low-side source electrode, wherein the high-side source electrode and the first low-side drain electrode are shared as a single source and drain electrode, and the high-side drain electrode, the high-side gate electrode, the source and drain electrode, the first low-side gate electrode and the first low-side source electrode are arranged in this order while being interposed by gaps, respectively.
1. A semiconductor device comprising:
a high-side field-effect transistor including a high-side drain electrode, a high-side gate electrode, and a high-side source electrode;
a first low-side field-effect transistor including a first low-side drain electrode, a first low-side gate electrode and a first low-side source electrode, the high-side source electrode and the first low-side drain electrode being shared as a single source and drain electrode;
a second low-side field-effect transistor including a second low-side drain electrode, and a second low-side gate electrode;
a semiconductor substrate on which the high-side drain electrode, the high-side gate electrode, the single source and drain electrode, the first low-side gate electrode and the first low-side source electrode are formed;
an insulating layer formed on the high-side drain electrode, the high-side gate electrode, the single source and drain electrode, the first low-side gate electrode, the first low-side source electrode, the second low-side drain electrode, and the second low-side gate electrode, the insulating layer having first holes which are formed above the second low-side drain electrode and the single source and drain electrode to penetrate through the insulating layer;
a first wiring connected to the second low-side drain electrode and the single source and drain electrode through the first holes;
a third low-side field-effect transistor including a third low-side gate electrode and a second low-side source electrode; and
a second wiring connecting the first low-side source electrode and the second low-side source electrode,
wherein the first low-side source electrode and the second low-side source electrode are connected by the second wiring via second holes formed above the first low-side source electrode and the second low-side source electrode to penetrate through the insulating layer,
wherein the high-side drain electrode, the high-side gate electrode, the single source and drain electrode, the first low-side gate electrode, the first low-side source electrode, the second low-side gate electrode, the second low-side drain electrode, the third low-side gate electrode, and the second low-side source electrode are sequentially arranged while being interposed by gaps, respectively.
2. The semiconductor device according to claim 1 , further comprising:
another semiconductor device having similar constitutional elements and features to those of the semiconductor device according to claim 1 ,
wherein the other semiconductor device has a line-symmetric structure in its plan view relative to a center line along a longitudinal direction of the second low-side source electrode and arranged in contact with the semiconductor device while sharing the second low-side source electrode.
3. The semiconductor device according to claim 1 , further comprising:
another semiconductor device having similar constitutional elements and features to those of the semiconductor device according to claim 1 ,
wherein the other semiconductor device has a line-symmetric structure in its plan view relative to a center line along a longitudinal direction of the high-side drain electrode and arranged in contact with the semiconductor device while sharing the high-side drain electrode.
4. The semiconductor device according to claim 1 ,
wherein the semiconductor substrate has a laminated structure including an electron supplying layer formed on a channel layer.
5. The semiconductor device according to claim 1 ,
wherein the high-side drain electrode, the source and drain electrode, the second low-side drain electrode and the first low-side source electrode are in contact with the semiconductor substrate by an ohmic contact.
6. The semiconductor device according to claim 1 ,
wherein the high-side gate electrode and the first low-side gate electrode are formed on the semiconductor substrate via a dielectric layer.
7. The semiconductor device according to claim 1 ,
wherein the high-side drain electrode is set to have a first voltage, the first low-side source electrode is set to have a second voltage, and the first voltage is higher than the second voltage.
8. The semiconductor device according to claim 7 ,
wherein the high-side field-effect transistor and the first low-side field-effect transistor are alternately set to ON state.
9. The semiconductor device according to claim 1 , further comprising:
a third wiring connected to the high-side drain electrode, wherein the first wiring, the second wiring, and the third wiring are formed by patterning a metallic film formed on the insulating layer.