Chip package
According to an embodiment of the invention, a chip package is provided, which includes: a substrate having a first surface and a second surface; an optical device between the first surface and the second surface of the substrate; a protection layer formed on the second surface of the substrate, wherein the protection layer has at least an opening; at least a conducting bump formed in the opening of the protection layer and electrically connected to the optical device; and a light shielding layer formed on the protection layer, wherein the light shielding layer is further extended onto a sidewall of the opening of the protection layer.
1. A chip package, comprising:
a substrate having a first surface and a second surface;
an optical device between the first surface and the second surface of the substrate;
a protection layer formed on the second surface of the substrate, wherein the protection layer has at least an opening;
at least a conducting bump formed in the opening of the protection layer and electrically connected to the optical device; and
a light shielding layer formed on the protection layer and extending onto a sidewall of the opening of the protection layer, wherein the light shielding layer comprises a polymer material.
2. The chip package as claimed in claim 1 , further comprising a conducting layer formed on the second surface of the substrate, wherein the conducting layer electrically contacts with the conducting bump and electrically connects to the optical device.
3. The chip package as claimed in claim 1 , further comprising a second light shielding layer formed on the second surface of the substrate.
4. The chip package as claimed in claim 1 , further comprising:
a transparent substrate disposed on the first surface of the substrate; and
a third light shielding layer formed on a surface of the transparent substrate.
5. The chip package as claimed in claim 1 , wherein an edge of the protection layer is not coplanar with a sidewall of the substrate.
6. The chip package as claimed in claim 2 , wherein the light shielding layer directly contacts with the conducting layer.
7. The chip package as claimed in claim 3 , wherein the second light shielding layer is located between the substrate and the protection layer.
8. The chip package as claimed in claim 3 , wherein the second light shielding layer is further extended onto a sidewall of the substrate.
9. The chip package as claimed in claim 3 , wherein the second light shielding layer comprises a polymer material.
10. The chip package as claimed in claim 7 , wherein a thickness of the second light shielding layer is smaller than a thickness of the light shielding layer.
11. The chip package as claimed in claim 8 , wherein a thickness of the second light shielding layer is smaller than a thickness of the light shielding layer.
12. The chip package as claimed in claim 8 , further comprising a transparent substrate disposed on the first surface of the substrate, wherein the second light shielding layer is further extended onto a sidewall of the transparent substrate.
13. A chip package, comprising:
a substrate having a first surface and a second surface;
an optical device between the first surface and the second surface of the substrate;
a protection layer formed on the second surface of the substrate, wherein the protection layer has at least an opening;
at least a conducting bump formed in the opening of the protection layer and electrically connected to the optical device; and
a light shielding layer formed on the protection layer and extending onto a sidewall of the opening of the protection layer, wherein the light shielding layer is further extended onto a sidewall of the substrate.
14. The chip package as claimed in claim 13 , further comprising a transparent substrate disposed on the first surface of the substrate, wherein the light shielding layer is further extended onto a sidewall of the transparent substrate.
15. A chip package, comprising:
a substrate having a first surface and a second surface;
an optical device between the first surface and the second surface of the substrate;
a protection layer formed on the second surface of the substrate, wherein the protection layer has at least an opening;
at least a conducting bump formed in the opening of the protection layer and electrically connected to the optical device;
a light shielding layer formed on the second surface of the substrate, wherein the light shielding layer comprises a polymer material; and
at least a second light shielding layer formed on the second surface of the substrate.
16. The chip package as claimed in claim 15 , wherein the light shielding layer is formed on a surface of the protection layer.
17. The chip package as claimed in claim 15 , wherein the second light shielding layer is located between the protection layer and the substrate.
18. The chip package as claimed in claim 15 , wherein a thickness of the second light shielding layer is smaller than a thickness of the light shielding layer.
19. The chip package as claimed in claim 15 , wherein the light shielding layer is further extended onto a sidewall of the substrate.
20. The chip package as claimed in claim 15 , further comprising a third light shielding layer formed on a sidewall of the substrate.
21. The chip package as claimed in claim 15 , further comprising:
a transparent substrate disposed on the first surface of the substrate; and
a fourth light shielding layer formed on a surface of the transparent substrate.
22. The chip package as claimed in claim 15 , wherein an edge of the protection layer is not coplanar with a sidewall of the substrate.
23. The chip package as claimed in claim 16 , wherein the light shielding layer is further extended onto a sidewall of the opening of the protection layer.
24. The chip package as claimed in claim 15 , wherein the second light shielding layer comprises a polymer material.
25. The chip package as claimed in claim 19 , further comprising a transparent substrate disposed on the first surface of the substrate, wherein the light shielding layer is further extended onto a sidewall of the transparent substrate.
26. The chip package as claimed in claim 20 , wherein a thickness of the third light shielding layer is smaller than a thickness of the light shielding layer.
27. The chip package as claimed in claim 20 , further comprising a transparent substrate disposed on the first surface of the substrate, wherein the third light shielding layer is further extended onto a sidewall of the transparent substrate.
28. A chip package, comprising:
a substrate having a first surface and a second surface;
an optical device between the first surface and the second surface of the substrate;
a protection layer formed on the second surface of the substrate, wherein the protection layer has at least an opening;
at least a conducting bump formed in the opening of the protection layer and electrically connected to the optical device;
a light shielding layer formed on the second surface of the substrate; and
at least a second light shielding layer formed on the second surface of the substrate, wherein the light shielding layer does not directly contact with the second light shielding layer.