IP Library Granted Patent US 8,552,971
Granted Patent B2
US 8,552,971 · App. 12/934,434 · Granted Oct 8, 2013

Driving circuit for light emitting diode

Inventors: Hiroyuki Ishikawa (Kyoto, JP); Hiroyuki Kumasaka (Kyoto, JP)
Assignee: Rohm Co., Ltd.
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Quick Facts
Patent No.
US 8,552,971
App. No.
12/934,434
Granted
Oct 8, 2013
Kind
B2
Abstract

An LED driving circuit drives multiple channels of light emitting units which provide a function as a backlight for a liquid crystal panel. An interface unit receives a luminance setting signal that specifies the luminance for each channel. The LED driving circuit drives each of the multiple channels of light emitting units with a luminance that corresponds to the luminance setting signal.

Claims (20)

1. A driving circuit for a plurality of channels of light-emitting diodes providing a function as a backlight for a liquid crystal panel, comprising:

an interface unit which receives, from an external processor, a luminance setting signal which specifies a luminance for each channel;

a logic unit which receives a signal from the interface unit, and generates pulse signals, each having a duty ratio that corresponds to a luminance of the light emitting diode in the corresponding channel;

a current setting unit which generates a constant current based upon an external voltage;

a plurality of current mirror circuits, each of which generates based upon the constant current, a driving current to be applied to the light-emitting diode in corresponding channel; and

a plurality of first transistors each of which switches the corresponding current mirror circuit between an ON state and an OFF state according to the pulse signal received from the logic unit, wherein the driving circuit is configured such that it can be switched between an independent driving mode in which the luminance of each of the plurality of channels of light-emitting diodes can be independently set according to an external signal and a parallel driving mode in which one selected from among the plurality of channels of light emitting diodes is driven by a plurality of the current mirror circuits.

2. A driving circuit according to claim 1 , further comprising a booster circuit which supplies a driving voltage to an anode terminal of the light-emitting diode for each channel, and which monitors the cathode voltages of the plurality of channels of light-emitting diodes, and which adjusts the driving voltage such that the smallest electric potential selected from among the cathode voltages thus monitored matches a predetermined target value.

3. A driving circuit according to claim 1 , wherein the logic unit includes a counter,

and wherein the current mirror is set to an ON state according to the pulse signal during a period before a count value specified by the luminance setting signal is counted,

and wherein the current mirror is set to an OFF state according to the pulse signal during the remainder of the count period.

4. A driving circuit according to claim 1 , further comprising an oscillator which generates a clock signal,

wherein the logic unit generates the pulse signal having a duty ratio that corresponds to the luminance, based upon the clock signal generated by the oscillator.

5. A driving circuit according to claim 1 , wherein each of the plurality of current mirror circuits includes:

a second transistor arranged such that a current that corresponds to a current generated by the current setting unit flows through a drain of the second transistor; and

a third transistor arranged with a gate thereof connected to a gate of the second transistor such that a current that flows through corresponding one of the light-emitting diodes flows through a drain of the third transistor,

wherein the gates of the second transistor and the third transistor are connected to a drain of corresponding one of the plurality of first transistors,

and wherein the pulse signal output from the logic unit is input to the gates of the second transistor and the third transistor.

6. A driving circuit according to claim 4 , wherein the oscillator can be operated in either a master mode or a slave mode,

and wherein, in the master mode, the oscillator oscillates at a predetermined frequency so as to generate the clock signal, and outputs a signal synchronously with the clock signal, to an external circuit,

and wherein, in the slave mode, the oscillator generates the clock signal synchronously with a signal input from an external circuit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2010
From: ISHIKAWA, HIROYUKI; KUMASAKA, HIROYUKI
To: ROHM CO., LTD.
Reel/Frame 025040/0113 →
Priority Claims (1)
JP 2008-078591 · Mar 25, 2008 · national
Continuity (1)
Related Publication 20110018914A1 · Jan 27, 2011