IP Library › Granted Patent US 8,563,977
Granted Patent B2
US 8,563,977 · App. 12/672,103 · Granted Oct 22, 2013

Thin film transistor having a two-layer semiconductor with columnar structures, manufacturing method therefor, and display apparatus using the same

Inventors: Mikio Shimada (Kawasaki, JP); Ryo Hayashi (Yokohama, JP); Hideya Kumomi (Tokyo, JP)
Assignee: Canon Kabushiki Kaisha
H01L33/16H01L33/0054
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Quick Facts
Patent No.
US 8,563,977
App. No.
12/672,103
Granted
Oct 22, 2013
Kind
B2
Abstract

A transistor is constituted of a gate electrode 2 , a gate insulation layer 3 , a semiconductor layer 4 formed of an amorphous oxide, a source electrode 5 , a drain electrode 6 and a protective layer 7 . The protective layer 7 is provided on the semiconductor layer 4 in contact with the semiconductor layer 4 , and the semiconductor layer 4 includes a first layer at least functioning as a channel layer and a second layer having higher resistance than the first layer. The first layer is provided on the gate electrode 2 side of the semiconductor layer 4 and the second layer is provided on the protective layer 7 side of the semiconductor layer 4.

Claims (21)

1. A thin film transistor comprising:

a gate electrode;

a gate insulation layer;

a semiconductor layer formed of an amorphous oxide semiconductor by sputtering;

a source electrode;

a drain electrode; and

a protective layer formed in an oxidative atmosphere,

wherein said protective layer is provided on said semiconductor layer in contact with said semiconductor layer, and

wherein said semiconductor layer includes a first layer at least functioning as a channel layer and a second layer having higher resistance than said first layer, said second layer being provided on the protective layer side of said semiconductor layer, and said second layer containing a columnar structure of columns surrounded by boundaries which have lower mass density than the columns such that said second layer has a mass density not larger than the mass density of said first layer.

2. The thin film transistor according to claim 1 , wherein said columnar structure comprises columns having an average diameter not larger than ⅔ of the thickness of the amorphous semiconductor layer.

3. The thin film transistor according to claim 1 , wherein said amorphous oxide semiconductor contains at least one of In, Zn and Ga.

4. The thin film transistor according to claim 1 , wherein said first layer is provided on the gate electrode side of said semiconductor layer.

5. A display comprising the thin film transistor according to claim 1 as a switching device.

6. A method for manufacturing a thin film transistor comprising a gate electrode, a gate insulation layer, a semiconductor layer formed of an amorphous oxide semiconductor, a source electrode, a drain electrode and a protective layer, the method comprising the steps of:

forming the gate electrode;

forming the gate insulation layer;

forming the semiconductor layer by sputtering;

forming the source electrode and the drain electrode; and

forming the protective layer in an oxidative atmosphere,

wherein the semiconductor layer includes a first layer at least functioning as a channel layer and a second layer provided on the protective layer side of the semiconductor layer, the second layer containing a columnar structure of columns surrounded by boundaries which have lower mass density than the columns such that the second layer has a mass density not larger than the mass density of the first layer structure, and

wherein after forming of the protective layer, the second layer has higher resistance than the first layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 25, 2010
From: SHIMADA, MIKIO; HAYASHI, RYO; KUMOMI, HIDEYA
To: CANON KABUSHIKI KAISHA
Reel/Frame 024432/0889 →
Priority Claims (2)
JP 2007-254364 · Sep 28, 2007 · national
JP 2008-196038 · Jul 30, 2008 · national
Continuity (1)
Related Publication 20100213459A1 · Aug 26, 2010