IP Library Granted Patent US 8,564,135
Granted Patent B2
US 8,564,135 · App. 12/996,865 · Granted Oct 22, 2013

Backside illuminated sensor and manufacturing method thereof

Inventor: Sung-Gyu Pyo (Gyeonggi-do, KR)
Assignee: Intellectual Ventures II LLC
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Quick Facts
Patent No.
US 8,564,135
App. No.
12/996,865
Granted
Oct 22, 2013
Kind
B2
Abstract

Disclosed is a backside illuminated image sensor including a light receiving element formed in a first substrate, an interlayer insulation layer formed on the first substrate including the light receiving element, a via hole formed through the interlayer insulation layer and the first substrate while being spaced apart from the light receiving element, a spacer formed on an inner sidewall of the via hole, an alignment key to fill the via hole, interconnection layers formed on the interlayer insulation layer in a multilayer structure in which a backside of a lowermost layer of the interconnection layers is connected to the alignment key, a passivation layer covering the interconnection layers, a pad locally formed on a backside of the first substrate and connected to a backside of the alignment key, and a color filter and a microlens formed on the backside of the first substrate corresponding to the light receiving element.

Claims (32)

1. An image sensor, comprising:

a first substrate including a light-receiving element configured to receive light from a first side of the first substrate;

a second substrate bonded to a second side of the first substrate, wherein the second substrate comprises peripheral circuitry configured to process signals associated with the light-receiving element;

an interlayer insulation layer positioned between the first substrate and the second substrate;

a via hole formed through the interlayer insulation layer and the first substrate;

a spacer formed on an inner sidewall of the via hole;

an alignment key configured to fill the via hole;

a barrier layer positioned between the spacer and the alignment key along an inner surface of the via hole;

interconnection layers formed between the interlayer insulation layer and the second substrate with at least one layer of the interconnection layer coupled to the alignment key; and

a pad formed on the first side of the first substrate and coupled to the alignment key.

2. The image sensor of claim 1 , further comprising a color filter and a microlens both formed on the first side of the first substrate, wherein the color filter and microlens are configured to direct light toward the light-receiving element.

3. The image sensor of claim 1 , further comprising an adhesive layer formed between the barrier layer and the spacer.

4. The image sensor of claim 1 , wherein the barrier layer comprises a layer selected from the group consisting of Ti, TiN, Ta, TaN, AlSiTiN, NiTi, TiBN, ZrBN, TiAlN, TiB2, Ti/TiN, and Ta/TaN.

5. The image sensor of claim 1 , wherein the spacer comprises a nitride layer having an etching selectivity that is higher than an etching selectivity of the first substrate.

6. The image sensor of claim 2 , further comprising an anti-light scattering layer positioned between the first substrate and the color filter.

7. The image sensor of claim 1 , wherein the alignment key comprises a conductive material.

8. The image sensor of claim 1 , further comprising a plurality of alignment keys configured to extend through the interlayer insulation layer and the first substrate.

9. The image sensor of claim 1 , further comprising a passivation layer positioned between the first substrate and the second substrate.

10. The image sensor of claim 1 , wherein the alignment key extends through a buried oxide layer of the first substrate.

11. An image sensor, comprising:

a first substrate including a front side and a back side;

a light-receiving element formed in the front side of the first substrate;

a microlens formed on the back side of the first substrate and configured to direct light toward the light-receiving element;

a second substrate bonded to the front side of the first substrate, wherein the second substrate includes circuitry configured to process image signals generated by the light-receiving element;

an interlayer insulation layer positioned between the first substrate and the second substrate;

a plurality of via holes formed through the interlayer insulation layer and the first substrate;

a spacer formed on an inner sidewall of each via hole;

a plurality of alignment keys, each alignment key configured to fill a corresponding via hole; and

a barrier layer positioned between the spacer and the alignment key along an inner surface of each via hole.

12. The image sensor of claim 11 , further comprising:

a plurality of interconnection layers formed between the first substrate and the second substrate; and

a pad formed on the back side of the first substrate and coupled to the plurality of interconnection layers via an alignment key from the plurality of alignment keys.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 23, 2019
From: INTELLECTUAL VENTURES ASSETS 128 LLC
To: SK HYNIX INC.
Reel/Frame 050806/0162 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2019
From: INTELLECTUAL VENTURES II LLC
To: INTELLECTUAL VENTURES ASSETS 128 LLC
Reel/Frame 050340/0714 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 4, 2011
From: PYO, SUNG GYU
To: CROSSTEK CAPITAL, LLC
Reel/Frame 027175/0512 →
MERGER Recorded Jul 22, 2011
From: CROSSTEK CAPITAL, LLC
To: INTELLECTUAL VENTURES II LLC
Reel/Frame 026637/0632 →
Priority Claims (1)
KR 10-2008-0054876 · Jun 11, 2008 · national
Continuity (1)
Related Publication 20110186951A1 · Aug 4, 2011