IP Library Granted Patent US 8,587,040
Granted Patent B2
US 8,587,040 · App. 13/227,851 · Granted Nov 19, 2013

Solid state imaging device and electronic apparatus

Inventors: Shoji Kobayashi (Kanagawa, JP); Yoshiharu Kudoh (Kanagawa, JP); Takuya Sano (Kanagawa, JP)
Assignee: Sony Corporation
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Quick Facts
Patent No.
US 8,587,040
App. No.
13/227,851
Granted
Nov 19, 2013
Kind
B2
Abstract

A solid state imaging device including: a pixel region that is formed on a light incidence side of a substrate and to which a plurality of pixels that include photoelectric conversion units is arranged; a peripheral circuit unit that is formed in a lower portion in the substrate depth direction of the pixel region and that includes an active element; and a light shielding member that is formed between the pixel region and the peripheral circuit unit and that shields the incidence of light, emitted from an active element, to the photoelectric conversion unit.

Claims (36)

1. A solid state imaging device comprising:

a pixel region comprising a plurality of pixels that include photoelectric conversion units;

a peripheral circuit unit; and

a light shielding member,

wherein,

the pixel region overlays the peripheral circuit unit,

The device is configured for receipt of incident light via the pixel region,

the light shielding member comprises first and second overlapping wiring layers positioned between the pixel region and the peripheral circuit unit, the first wiring layers overlying gaps between the second wiring layers, and

the light shielding member is effective to shield the pixel region from light emitted by active elements in the peripheral circuit unit.

2. The solid state imaging device according to claim 1 , wherein:

each pixel includes a photoelectric conversion unit and a plurality of pixel transistors, and

the active element of the peripheral circuit unit is one or both of a MOS transistor and a diode.

3. The solid state imaging device according to claim 2 , wherein;

the solid-state imaging device comprises first and second semiconductor chips affixed together, the first semiconductor chip including—a first multilayer wiring layer and the pixel region, the second semiconductor chip including a second multilayer wiring layer and the peripheral circuit unit,

the peripheral circuit unit includes a logic circuit, and

the first semiconductor chip unit and the second semiconductor chip unit are electrically connected by a connected conductor that penetrates the first semiconductor chip.

4. The solid state imaging device according to claim 3 , wherein the first semiconductor chip unit and the second semiconductor chip unit are affixed with the first and second multilayer wiring layers facing the other.

5. The solid state imaging device according to claim 1 , wherein the light shielding member is formed by a reflection and dispersion member that reflects and disperses light.

6. The solid state imaging device according to claim 1 , wherein the light shielding member is formed by a light absorbing member that absorbs light.

7. The solid state imaging device according to claim 1 , wherein the light shielding member is formed by a combination of a reflection and dispersion member that reflects and disperses light, and a light absorbing member that absorbs light.

8. The solid state imaging device according to claim 5 , wherein the reflection and dispersion member is formed by a single metallic film.

9. The solid state imaging device according to claim 5 , wherein the reflection and dispersion member is formed by a combination of a single metallic film and wiring of a plurality of layers, dummy wiring of a plurality of layers, or a combination of wiring and dummy wiring of a plurality of layers of the multilayer wiring layer.

10. The solid state imaging device according to claim 6 , wherein the light absorbing member is formed of a single film using a semiconductor with a small band gap.

11. An electronic apparatus comprising:

a solid state imaging device;

an optical system that guides incident light to photoelectric conversion units of the solid state imaging device; and

a signal processing circuit that processes an output signal of the solid state imaging device,

wherein the solid state imaging device is configured by a solid state imaging device according to claim 1 .

12. A solid-state imaging device comprising:

first and second semiconductor chips affixed to each other, the first semiconductor including pixels each of which comprises a photoelectric conversion unit, the second semiconductor chip including a peripheral circuit that processes signals from the pixels; and

a light shielding member between the pixels and the peripheral circuit,

wherein,

the light shielding member comprises overlapping first and second wiring layer, the first wiring layer overlying gaps in the second wiring layer,

the solid-state imaging device is configure to receive incident light first via the first semiconductor chip, and

the light shielding member is effective to shield the pixels from light emitted by an active element in the peripheral circuit.

13. The solid-state imaging device of claim 12 , wherein the first and second wiring layers are in the second semiconductor chip.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 8, 2011
From: KOBAYASHI, SHOJI; KUDOH, YOSHIHARU; SANO, TAKUYA
To: SONY CORPORATION
Reel/Frame 026872/0815 →
Priority Claims (1)
JP 2010-206890 · Sep 15, 2010 · national
Continuity (1)
Related Publication 20120062777A1 · Mar 15, 2012