IP Library › Granted Patent US 8,592,883
Granted Patent B2
US 8,592,883 · App. 13/233,038 · Granted Nov 26, 2013

Semiconductor structure and method for making same

Inventors: Dieter Claeys (Kallmuenz, DE); Bernd Eisener (Hohenbrunn, DE); Guenter Pfeifer (Pentling, DE); Detlef Wilhelm (Regensburg, DE)
Assignee: Infineon Technologies AG
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Quick Facts
Patent No.
US 8,592,883
App. No.
13/233,038
Granted
Nov 26, 2013
Kind
B2
Abstract

An embodiment may be a semiconductor structure, comprising; a workpiece having a front side and a back side; and a capacitor disposed in the workpiece, the capacitor including a bottom electrode electrically coupled to a back side of said workpiece. In an embodiment, the bottom electrode may form a conductive pathway to the front side of the workpiece. In an embodiment, the capacitor may be a trench capacitor.

Claims (33)

1. A semiconductor structure, comprising:

a first semiconductor layer, said first semiconductor layer being a semiconductor substrate;

a second semiconductor layer overlying said first semiconductor layer, said second semiconductor layer being an epitaxial layer;

a third semiconductor layer overlying said second semiconductor layer, said third semiconductor layer being an epitaxial layer; and

a capacitor disposed in said first, said second and said third semicondutor layers, said capacitor including a bottom electrode electrically coupled to said first semiconductor layer.

2. The structure of claim 1 , wherein said bottom electrode is an electrical pathway through said second and third semiconductor layers.

3. The structure of claim 1 , wherein said first semiconductor layer includes a dopant of a first conductivity type, said second semiconductor layer includes a dopant of said first conductivity type, said third semiconductor material includes a dopant of a second conductivity type opposite said first conductivity type.

4. The structure of claim 3 , wherein said first conductivity type is p-type and said second conductivity type is n-type.

5. The structure of claim 3 , wherein a concentration of said dopant of said first semiconductor layer is higher than a concentration of said dopant of said second semiconductor layer.

6. The structure of claim 1 , wherein said bottom electrode extends to a top surface of said third semiconductor layer.

7. The structure of claim 1 , wherein said capacitor is a trench capacitor.

8. A semiconductor structure, comprising:

a first semiconductor layer, said first semiconductor layer being a semiconductor substrate;

a second semiconductor layer overlying said first semiconductor layer, said second semiconductor layer being an epitaxial layer;

a third semiconductor layer overlying said second semiconductor layer, said third semiconductor layer being an epitaxial layer;

an opening formed in said first, said second and said third semiconductor layer;

a conductive region disposed within said first, said second and said third semiconductor layers, said conductive region bordering a sidewall and bottom of said opening, said conductive region electrically coupled to said first semiconductor layer;

a dielectric layer disposed within said opening and over said conductive region; and

a conductive layer disposed over said dielectric layer within said opening.

9. The structure of claim 8 , wherein said conductive region is a doped region.

10. The structure of claim 8 , wherein said conductive region is a conductive pathway through said second and said third semiconductor layers.

11. The structure of claim 8 , wherein said conductive region extends to a top surface of said third semiconductor layer.

12. The structure of claim 8 , wherein said opening is one of a plurality of laterally spaced apart openings, said dielectric layer is one of a plurality of dielectric layers in which each dielectric layer is disposed in a respective opening, said conductive layer is one of a plurality of conductive layers in which each conductive layer is disposed over a respective dielectric layer.

13. The structure of claim 8 , wherein said conductive region, said dielectric layer and said conductive layer form a trench capacitor.

14. A semiconductor structure, comprising:

a layer stack including a first layer, a second layer over said first layer, and a third layer over said second layer,

wherein said first layer is a first doped semiconductor layer with a dopant of a first conductivity type, said second layer is a second doped semiconductor layer with a dopant of said first conductivity type and said third layer is a third doped semiconductor layer with a dopant of a second conductivity type opposite to that of the said first conductivity type;

and

a capacitor disposed in said stack and electrically coupled to said first layer.

15. The structure of claim 14 , wherein said capacitor electrically couples said first layer to a front side of said stack.

16. The structure of claim 14 , wherein said capacitor forms a conductive pathway from said first layer to a front side of said stack.

17. The structure of claim 14 , wherein said capacitor forms an electrical pathway from said first layer to a front side of said stack.

18. The structure of claim 14 , wherein said capacitor is a trench capacitor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 16, 2011
From: CLAEYS, DIETER; EISENER, BERND; PFEIFER, GUENTER; WILHELM, DETLEF
To: INFINEON TECHNOLOGIES AG
Reel/Frame 027401/0466 →
Continuity (1)
Related Publication 20130069198A1 · Mar 21, 2013