Phase-change memory element

1. A phase-change memory element, comprising:

a first electrode and a second electrode;

a phase-change material layer electrically connected to the first electrode and the second electrode; and

at least two metal spacers serving as electrically isolated conductors, disposed between and separated from the first electrode and the second electrode, directly contacting the phase-change material layer, wherein the phase-change material layer directly covers all surfaces of each electrically isolated conductor except a bottom surface of each electrically isolated conductor.

2. The phase-change memory element as claimed in claim 1 , wherein the electrically isolated conductors are electrically disconnected from other components except for the phase-change material layer.

3. The phase-change memory element as claimed in claim 1 , wherein the first electrode and the second electrode are coplanar.

4. The phase-change memory element as claimed in claim 1 , wherein each electrically isolated conductor does not directly contact the first or the second electrodes.

5. The phase-change memory element as claimed in claim 1 , wherein the phase-change material layer comprises In, Ge, Sb, Te, Ga, Sn or combinations thereof.

6. The phase-change memory element as claimed in claim 1 , wherein the first electrode and the second electrode are independent and respectively comprise Al, W, Mo, Ti, TiN, TiAIN, TiW or TaN.

7. The phase-change memory element as claimed in claim 1 , wherein each electrically isolated conductor comprises Al, W, Mo, Ti, TiN, TiAIN, TiW or TaN.

8. The phase-change memory element as claimed in claim 1 , wherein the first electrode and the second electrode are formed by the same process and made by the same material.

9. The phase-change memory element as claimed in claim 1 , wherein the phase-change memory element comprises a pillar structure.

10. The phase-change memory element as claimed in claim 1 , wherein the first electrode is a bottom electrode and the second electrode is a top electrode.

11. The phase-change memory element as claimed in claim 1 , wherein the electrically isolated conductors are separated by a dielectric layer.

12. The phase-change memory element as claimed in claim 1 , wherein each electrically isolated conductor and the electrode adjacent thereto (the first electrode or the second electrode) are separated by the phase-change material layer.

13. The phase-change memory element as claimed in claim 1 , wherein the first electrode is electrically connected to an electrical element via a first metal plug.

14. The phase-change memory element as claimed in claim 1 , wherein the second electrode is electrically connected to a bit line via a second metal plug.

15. A phase-change memory element, comprising:

a substrate with a dielectric layer;

a first electrode and a second electrode formed on the dielectric layer;

a phase-change material layer electrically connected to the first electrode and the second electrode;

at least two metal spacers serving as electrically isolated conductors, disposed between and separated from the first electrode and the second electrode, directly contacting the phase-change material layer, wherein the phase-change material layer directly covers all surfaces of each electrically isolated conductor except a bottom surface of each electrically isolated conductor; and

a conductive layer electrically connected to the second electrode via a contact.

16. The phase-change memory element as claimed in claim 15 , wherein the electrically isolated conductors are electrically disconnected from other components except for the phase-change material layer.

17. The phase-change memory element as claimed in claim 15 , wherein the first electrode and the second electrode are coplanar.

18. The phase-change memory element as claimed in claim 15 , wherein each electrically isolated conductor does not directly contact the first or the second electrodes.

19. The phase-change memory element as claimed in claim 15 , wherein the phase-change material layer comprises In, Ge, Sb, Te, Ga, Sn or combinations thereof.

20. The phase-change memory element as claimed in claim 15 , wherein the first electrode and the second electrode are independent and respectively comprise Al, W, Mo, Ti, TiN, TiAIN, TiW or TaN.

21. The phase-change memory element as claimed in claim 15 , wherein each electrically isolated conductor comprises Al, W, Mo, Ti, TiN, TiAIN, TiW or TaN.

22. The phase-change memory element as claimed in claim 15 , wherein the first electrode and the second electrode are formed by the same process and made by the same material.

23. The phase-change memory element as claimed in claim 15 , wherein the phase-change memory element comprises a pillar structure.

24. The phase-change memory element as claimed in claim 15 , wherein the first electrode is a bottom electrode and the second electrode is a top electrode.

25. The phase-change memory element as claimed in claim 15 , wherein the electrically isolated conductors are separated by a dielectric layer.

26. The phase-change memory element as claimed in claim 15 , wherein each electrically isolated conductor and the electrode adjacent thereto (the first electrode or the second electrode) are separated by the phase-change material layer.

27. The phase-change memory element as claimed in claim 15 , wherein the first electrode is electrically connected to an electrical element via a first metal plug.

28. A method for forming a phase-change memory element, comprising:

providing a substrate;

forming a dielectric layer on the substrate;

forming a first electrode and a second electrode on the dielectric layer;

forming at least two metal spacers serving as electrically isolated conductors on the dielectric layer, disposed between and separated from the first electrode and the second electrode; and

forming a phase-change material layer directly contacting and electrically connected to the first electrode and the second electrode and directly covering all surfaces of each electrically isolated conductor except a bottom surface of each electrically isolated conductor.

29. The method as claimed in claim 28 , wherein the first electrode and the second electrode are independent and respectively comprise Al, W, Mo, Ti, TiN, TiAIN, TiW or TaN.

30. The method as claimed in claim 28 , wherein the electrically isolated conductors are electrically disconnected from other components except for the phase-change material layer.

31. The method as claimed in claim 28 , wherein the first electrode and the second electrode are coplanar.

32. The method as claimed in claim 28 , wherein the electrically isolated conductor does not directly contact the first or the second electrodes.

33. The method as claimed in claim 28 , wherein the phase-change material layer comprises In, Ge, Sb, Te, Ga, Sn or combinations thereof.

34. The method as claimed in claim 28 , wherein the phase-change memory element comprises a pillar structure.

35. The method as claimed in claim 28 , wherein each electrically isolated conductor comprises Al, W, Mo, Ti, TiN, TiAIN, TiW or TaN.

36. The method as claimed in claim 28 , wherein the electrically isolated conductors are separated by a dielectric layer.

37. The method as claimed in claim 28 , wherein each electrically isolated conductor and the electrode adjacent thereto (the first electrode or the second electrode) are separated by the phase-change material layer.

38. The method as claimed in claim 28 , wherein the first electrode is electrically connected to an electrical element via a first metal plug.

39. The method as claimed in claim 28 , wherein the second electrode is electrically connected to a bit line via a second metal plug.