IP Library › Granted Patent US 8,610,119
Granted Patent B2
US 8,610,119 · App. 13/141,118 · Granted Dec 17, 2013

Stability enhancements in metal oxide semiconductor thin film transistors

Inventors: Steven D. Theiss (Woodbury, MN); David H. Redinger (Oakdale, MN)
Assignee: 3M Innovative Properties Company
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Quick Facts
Patent No.
US 8,610,119
App. No.
13/141,118
Granted
Dec 17, 2013
Kind
B2
Abstract

A plasma hydrogenated region in the dielectric layer of a semiconductor thin film transistor (TFT) structure improves the stability of the TFT. The TFT is a multilayer structure including an electrode, a dielectric layer disposed on the electrode, and a metal oxide semiconductor on the dielectric. Exposure of the dielectric layer to a hydrogen containing plasma prior to deposition of the semiconductor produces a plasma hydrogenated region at the semiconductor-dielectric interface. The plasma hydrogenated region incorporates hydrogen which decreases in concentration from semiconductor/dielectric interface into the bulk of one or both of the dielectric layer and the semiconductor layer.

Claims (38)

1. A method of fabricating a multilayer semiconductor structure, comprising:

forming an electrode layer;

forming a dielectric layer proximate to the electrode layer;

after forming the dielectric layer, exposing the dielectric layer to a hydrogen-containing plasma; and

after exposing the dielectric layer to the hydrogen-containing plasma, forming a metal oxide semiconductor layer proximate to the dielectric layer

wherein a hydrogenated region is formed at a semiconductor-dielectric interface of the dielectric layer, the hydrogenated region incorporating hydrogen that decreases in concentration from the semiconductor-dielectric interface into one or both of the dielectric layer and the semiconductor layer.

2. The method of claim 1 , wherein forming the dielectric layer comprises anodizing the electrode layer.

3. The method of claim 1 , wherein the semiconductor layer comprises ZnO and the dielectric layer comprises Al 2 O 3 .

4. The method of claim 1 , wherein forming the electrode layer, forming the dielectric layer, exposing the dielectric layer to the hydrogen-containing plasma, and forming the semiconductor layer are performed in a roll to roll process on a flexible substrate.

5. The method of claim 1 , wherein forming the dielectric layer and forming the semiconductor layer are performed at a temperature of less than 100 C.

6. The method of claim 1 , wherein the hydrogen-containing plasma comprises about 5% hydrogen.

7. The method of claim 1 , wherein the hydrogen-containing plasma comprises deuteruim.

8. The method of claim 1 , wherein exposing the dielectric layer to the hydrogen-containing plasma comprises exposing the dielectric layer to at least about 0.01 Watts/cm 2 for about 3-5 minutes.

9. The method of claim 1 , wherein exposing the dielectric layer to the hydrogen-containing plasma further comprises creating a non-uniform hydrogen concentration profile that decreases from a first level at a first point at a surface of the dielectric layer to a second level at a second point in the dielectric layer farther from the surface.

10. The method of claim 1 , wherein:

forming the multilayer semiconductor structure comprises forming a thin film transistor; and

exposing the dielectric layer to a hydrogen-containing plasma comprises incorporating hydrogen into a hydrogenated region at a surface of the dielectric, the hydrogenated region including the incorporated hydrogen stabilizing a threshold voltage of the transistor.

11. A method of fabricating a multilayer semiconductor structure, comprising:

forming an electrode layer;

forming a dielectric layer proximate to the electrode layer;

after forming the dielectric layer, processing the dielectric layer to create a hydrogenated region at a surface of the dielectric layer, the hydrogenated region having a non-uniform hydrogen profile wherein a concentration of hydrogen decreases from a first point at a surface of the dielectric to a second point within dielectric layer; and

forming a metal oxide semiconductor layer proximate to the dielectric layer.

12. The method of claim 11 , wherein processing the dielectric layer comprises exposing the dielectric layer to a hydrogen-containing plasma after formation of the dielectric.

13. The method of claim 11 , wherein processing the dielectric layer comprises exposing the dielectric layer to a deuterium-containing plasma to create a non-uniform deuterium profile in the dielectric layer wherein a concentration of deuterium decreases from a first point at a surface of the dielectric to a second point within dielectric layer.

14. The method of claim 11 , wherein:

the electrode layer comprises aluminum (Al);

the dielectric comprises aluminum oxide (Al 2 O 3 ); and

the semiconductor comprises zinc oxide (ZnO).

15. The method of claim 11 , wherein processing the dielectric layer comprises increasing a hydrogen concentration at a surface of the dielectric layer, wherein a hydrogen concentration in a bulk of the dielectric layer near an interface between the electrode and the dielectric layer is not substantially increased by the processing.

16. A multilayer semiconductor structure, comprising:

an electrode;

a dielectric layer disposed proximate to the electrode;

a semiconductor layer comprising a metal oxide semiconductor disposed proximate to the dielectric layer; and

a hydrogenated region at a semiconductor-dielectric interface of the dielectric layer, wherein the hydrogenated region incorporates hydrogen that decreases in concentration from the semiconductor-dielectric interface into one or both of the dielectric layer and the semiconductor layer.

17. The semiconductor structure of claim 16 , wherein the hydrogenated region comprises a plasma hydrogenated region.

18. The semiconductor structure of claim 16 , wherein the metal oxide semiconductor comprises ZnO and the dielectric comprises aluminum oxide.

19. The semiconductor structure of claim 16 , wherein the hydrogen incorporated in the hydrogenated region comprises deuterium.

20. The semiconductor structure of claim 16 , further comprising a flexible polymeric substrate, wherein the electrode is disposed on the polymeric substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 21, 2011
From: THEISS, STEVEN D.; REDINGER, DAVID H.
To: 3M INNOVATIVE PROPERTIES COMPANY
Reel/Frame 026469/0928 →
Continuity (2)
Provisional Application 61140659 · Dec 24, 2008
Related Publication 20110253998A1 · Oct 20, 2011