IP Library Granted Patent US 8,611,471
Granted Patent B2
US 8,611,471 · App. 13/435,945 · Granted Dec 17, 2013

Method and system for reliable CFO and STO estimation in the presence of tuner induced impairment

Inventors: Saurabh Mishra (Madhepura, IN); Parag Naik (Bangalore, IN); Subrahmanya Kondageri Shankaraiah (Bangalore, IN); S Harish Krishnan (Bangalore, IN); Gururaj Padaki (Bangalore, IN)
Assignee: Saankhya Labs Pvt. Ltd.
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Quick Facts
Patent No.
US 8,611,471
App. No.
13/435,945
Granted
Dec 17, 2013
Kind
B2
Abstract

A system and method for reducing implementation complexity for estimation of a Carrier Frequency Offset (CFO) and a Symbol Timing Offset (STO) for an input signal for spectrally shaped multiple communication standards. The system is implemented by replacing multiplier with shifters. The system includes a CFO estimation block, a STO estimation block, and a band extraction block that extracts a lower band edge and an upper band edge of the input signal. The STO estimation block includes (i) a sample error generation block that computes a sampling timing error value, and (ii) a Phase Lock Loop block that estimates a frequency error and a phase error corresponding to the sampling timing error value. The CFO estimation block includes (i) a carrier offset error generation block that generates a carrier offset error value, and (ii) a leaky average block for performing a filter operation.

Claims (37)

1. A system for reducing implementation complexity in estimation of a Carrier Frequency Offset (CFO) and a Symbol Timing Offset (STO) for spectrally shaped multiple communication standards, said system comprising:

a carrier frequency offset (CFO) estimation block that controls a down conversion of an input signal to lock a carrier frequency;

a band extraction block that extracts a lower band edge and a upper band edge of said input signal required for said CFO and said STO estimation; and

a symbol timing offset (STO) estimation block comprising:

a sample error generation block that generates a sampling timing error value by multiplying said upper band edge with a conjugate of said lower band edge, and

a phase lock loop block that estimates a frequency error and a phase error corresponding to said sampling timing error value,

wherein a spectrum tilt correction factor obtained from a tilt information and a corresponding shift value is applied to estimate said CFO, wherein said tilt information is obtained from a tuner.

2. The system of claim 1 , wherein said frequency error and said phase error are estimated using a proportion integral (PI) based second order Phase Lock Loop (PLL).

3. The system of claim 1 , wherein said tilt information is compensated with said CFO estimation block for performing a concurrent estimation of said CFO and said STO.

4. A system for reducing implementation complexity in estimation of a Carrier Frequency Offset (CFO) and a Symbol Timing Offset (STO) for spectrally shaped multiple communication standards, said system comprising:

a symbol timing offset estimation block that estimates said STO;

a band extraction block that extracts a lower band edge and an upper band edge of a input signal required for estimation of said CFO; and

a carrier frequency offset (CFO) estimation block comprising:

a carrier offset error generation block that generates a carrier offset error value by obtaining an energy difference between said upper band edge and said lower band edge, and

a leaky average block that performs a filtering operation on said energy difference,

wherein a spectrum tilt correction factor obtained from a tilt information and a corresponding shift value is applied to estimate said CFO, wherein said tilt information is obtained from a tuner.

5. The system of claim 4 , wherein said tilt information is compensated with said CFO estimation block for performing a concurrent estimation of said CFO and said STO.

6. The system of claim 4 , further comprising:

an analog front end that receives an input signal and down-converts said input signal to any of an Intermediate Frequency (IF) signal, a Low Intermediate Frequency (LIF), and a Zero IF(ZIF);

an analog to digital converter (ADC) that converts any of said IF signal, said LIF, and said ZIF into a digital signal;

a numerically controlled oscillator (NCO) that generates a phase value; and

a down conversion block that down converts said digital signal to a baseband complex signal using a mixer based on said phase value.

7. The system of claim 4 , further comprising:

a signal conditioning filter directly connected to said down conversion block, wherein said signal conditioning filter rejects an unwanted out-of-band signals from said baseband complex signal.

8. The system of claim 7 , further comprising a sample rate converter (SRC) that converts said baseband complex signal to a required sampling frequency and phase.

9. A method for reducing implementation complexity in estimation of a Carrier Frequency Offset (CFO) and a Symbol Timing Offset (STO) for an input signal for spectrally shaped multiple communication standards in a receiver, said method comprising:

extracting an upper band edge and a lower band edge of said input signal;

estimating said STO based when said upper band edge and said lower band edge are extracted;

determining whether a carrier frequency is recovered; and

estimating said CFO only when said carrier frequency is not recovered,

wherein a spectrum tilt correction factor influences an accurate estimation of said CFO based on a spectrum tilt information obtained from a tuner of said receiver.

10. The method of claim 9 , wherein said estimating said STO comprises:

estimating a sampling timing error value by multiplying said upper band edge with a conjugate of said lower band edge, and

estimating a frequency error and a phase error corresponding to said sampling timing error value using a proportion integral (PI) based a second order Phase Lock Loop (PLL).

11. The method of claim 9 , wherein said estimating said CFO comprises:

computing a carrier offset error value by obtaining an energy difference between said upper band edge and said lower band edge; and

performing a filter operation on said energy difference.

Assignments (2)
MERGER Recorded Dec 6, 2024
From: SAANKHYA LABS PRIVATE LIMITED; SAANKHYA STRATEGIC ELECTRONICS PRIVATE LIMITED
To: TEJAS NETWORKS LIMITED
Reel/Frame 069583/0674 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2012
From: MISHRA, SAURABH; NAIK, PARAG; SHANKARAIAH, SUBRAHMANYA KONDAGERI; KRISHNAN, S. HARISH; PADAKI, GURURAJ
To: SAANKHYA LABS PVT. LTD.
Reel/Frame 027965/0616 →
Priority Claims (1)
IN 1092/CHE/2011 · Mar 31, 2011 · national
Continuity (1)
Related Publication 20120250750A1 · Oct 4, 2012