IP Library Granted Patent US 8,680,888
Granted Patent B2
US 8,680,888 · App. 13/327,623 · Granted Mar 25, 2014

Methods and systems for routing in a state machine

Inventors: David R. Brown (Lucas, TX); Harold B Noyes (Boise, ID); Irene Junjuan Xu (San Jose, CA); Paul Glendenning (Woodside, CA)
Assignee: Micron Technologies, Inc.
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Quick Facts
Patent No.
US 8,680,888
App. No.
13/327,623
Granted
Mar 25, 2014
Kind
B2
Abstract

A device includes a routing buffer. The routing buffer includes a first port configured to receive a signal relating to an analysis of at least a portion of a data stream. The routing buffer also includes a second port configured to selectively provide the signal to a first routing line of a block of a state machine at a first time. The routing buffer further includes a third port configured to selectively provide the signal to a second routing line of the block of the state machine at the first time.

Claims (33)

1. A device, comprising:

a routing buffer comprising:

a first port configured to receive a signal relating to an analysis of at least a portion of a data stream;

a second port configured to selectively provide the signal to a first routing line of a block of a state machine at a first time; and

a third port configured to selectively provide the signal to a second routing line of the block of the state machine at the first time.

2. The device of claim 1 , wherein the routing buffer comprises a bi-directional drive element coupled between the first port and the second port.

3. The device of claim 2 , wherein the routing buffer comprises a first control input configured to activate the bi-directional drive element to provide the signal from the second port.

4. The device of claim 1 , wherein the routing buffer comprises a uni-directional drive element coupled between the first port and the third port.

5. The device of claim 4 , wherein the routing buffer comprises a second control input configured to activate the uni-directional drive element to provide the signal from the third port.

6. The device of claim 1 , wherein the signal comprises a first signal and wherein the routing buffer further comprises a fourth port configured to selectively provide a second signal relating to an analysis of at least a portion of the data stream received at the second port at a second time, wherein the first port is configured to selectively provide the second signal at the second time.

7. The device of claim 6 , wherein the routing buffer comprises a third control input configured to activate a bi-directional drive element to provide the second signal from the first port.

8. The device of claim 7 , wherein the routing buffer comprises a uni-directional drive element coupled between the second port and the fourth port.

9. The device of claim 8 , wherein the routing buffer comprises a fourth control input configured to activate the uni-directional drive element to provide the second signal from the fourth port.

10. A device, comprising:

a state machine comprising:

a plurality of blocks, each of the blocks comprising:

a plurality of rows, each of the rows comprising a plurality of programmable elements, each of the programmable elements configured to analyze at least a portion of a data stream and to selectively output the result of the analysis; and

an intra-block switch configured to selectively route the result; and

a routing buffer coupled to one of the blocks and configured to:

receive the result from the intra-block switch at a first port; and

selectively provide the result from a second port and a third port of the routing buffer simultaneously.

11. The device of claim 10 , wherein the intra-block switch comprises a plurality of row routing lines configured to be selectively coupled to the programmable elements and configured to provide the results from the programmable elements.

12. The device of claim 11 , wherein the intra-block switch comprises a plurality of block routing lines configured to be selectively coupled to the plurality of row routing lines.

13. The device of claim 12 , wherein the intra-block switch comprises a plurality of junction points configured to selectively couple the block routing lines to the plurality of row routing lines.

14. The device of claim 10 , wherein the routing buffer comprises a bi-directional drive element coupled between the first port and the second port.

15. The device of claim 14 , wherein the routing buffer comprises a control input configured to activate the bi-directional drive element to provide the result from the second port.

16. The device of claim 10 , wherein the routing buffer comprises a uni-directional drive element coupled between the first port and the third port.

17. The device of claim 16 , wherein the routing buffer comprises a control input configured to activate the uni-directional drive element to provide the first signal from the third port.

18. A method, comprising: receiving at a first port of a routing buffer a signal relating to an analysis of at least a portion of a data stream; providing from a second port of the routing buffer the signal to a first block routing line of a block of a state machine at a first time; and providing from a third port of the routing buffer the signal to a second block routing line of the block of the state machine at the first time.

19. The method of claim 18 , comprising receiving at an intra-block switch of the block of the state machine the signal from both the first block routing line and the second block routing line.

20. The method of claim 19 , comprising: providing the signal from the first block routing line to a first row routing line in the intra-block switch; and providing the signal from the second block routing line to a second row routing line in the intra-block switch.

21. The method of claim 20 , comprising: providing the signal from the first row routing line to a first programmable element; and providing the signal from the second row routing line to a second programmable element.

22. The method of claim 21 , comprising: activating the first programmable element responsive to the signal; and activating the second programmable element responsive to the signal.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2012
From: BROWN, DAVID R.; NOYES, HAROLD B; XU, IRENE JUNJUAN; GLENDENNING, PAUL
To: MICRON TECHNOLOGY, INC.
Reel/Frame 027754/0190 →
Continuity (1)
Related Publication 20130156043A1 · Jun 20, 2013