IP Library Granted Patent US 8,724,804
Granted Patent B2
US 8,724,804 · App. 13/611,885 · Granted May 13, 2014

Encryption processing apparatus

Inventor: Takeshi Kawabata (Kanagawa, JP)
Assignee: Kabushiki Kaisha Toshiba
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,724,804
App. No.
13/611,885
Granted
May 13, 2014
Kind
B2
Abstract

According to an embodiment, a first linear transformation unit performs a linear transformation from mask data to first mask data. A second linear transformation unit performs a linear transformation from mask data to second mask data. A first calculator calculates first data based upon data to be processed and the first mask data. A selecting unit selects the first data or the second mask data. A non-linear transformation unit performs a non-linear transformation on the selected first data or second mask data. A second calculator calculates second data based upon the first data after the non-linear transformation and the mask data. A third linear transformation unit performs a linear transformation on the second data. The second data after the linear transformation by the third linear transformation unit is retained as new data to be processed, and the second mask data after the non-linear transformation is retained as new mask data.

Claims (45)

1. An encryption processing apparatus comprising:

a data register configured to retain data to be processed;

a mask register configured to retain mask data;

a first linear transformation circuit configured to perform a linear transformation from the mask data to first mask data;

a second linear transformation circuit configured to perform a linear transformation from the mask data to second mask data;

a first calculator configured to calculate first data based upon the data to be processed retained in the data register and the first mask data;

a selector configured to select either one of the first data and the second mask data;

a non-linear transformation circuit configured to perform a non-linear transformation on the first data or the second mask data selected by the selector;

a second calculator configured to calculate second data based upon the first data on which the non-linear transformation is performed by the non-linear transformation circuit, and the mask data retained in the mask register; and

a third linear transformation circuit configured to perform a linear transformation on the second data, wherein

the second data on which the linear transformation is performed by the third linear transformation circuit is retained in the data register as new data to be processed, and

the second mask data on which the non-linear transformation is performed by the non-linear transformation circuit is retained in the mask register as new mask data.

2. The apparatus according to claim 1 , wherein

the non-linear transformation circuit includes a first circuit performing a non-linear transformation in an encryption process, and a second circuit performing a non-linear transformation in a decryption process, the first circuit and the second circuit operating independently.

3. An encryption processing apparatus comprising:

a data register configured to retain data to be processed;

a mask register configured to retain mask data;

a key register configured to retain key data;

a first linear transformation circuit configured to perform a linear transformation from the mask data to first mask data;

a second linear transformation circuit configured to perform a linear transformation from the mask data to second mask data;

a first calculator configured to calculate first data based upon the data to be processed retained in the data register and the first mask data;

a first non-linear transformation circuit configured to perform a non-linear transformation on the first data;

a second calculator configured to calculate second data based upon the first data on which the non-linear transformation is performed by the first non-linear transformation circuit, and the mask data retained in the mask register;

a third linear transformation circuit configured to perform a linear transformation on the second data;

a selector configured to select either one of the key data retained in the key register and the second mask data; and

a second non-linear transformation circuit configured to perform a non-linear transformation on the key data or the second mask data selected by the selector, wherein

the second data on which the linear transformation is performed by the third linear transformation circuit is retained in the data register as new data to be processed,

the key data on which the non-linear transformation is performed by the second non-linear transformation circuit is retained in the key register as new key data, and

the second mask data on which the non-linear transformation is performed by the second non-linear transformation circuit is retained in the mask register as new mask data.

4. An encryption processing apparatus comprising:

a data register configured to retain data to be processed;

a mask register configured to retain mask data;

a key register configured to retain key data;

a first linear transformation circuit configured to perform a linear transformation from the mask data to first mask data;

a second linear transformation circuit configured to perform a linear transformation from the mask data to second mask data;

first calculator configured to calculate first data based upon the data to be processed retained in the data register and the first mask data;

a first selector configured to select either one of the first data and the second mask data;

a first non-linear transformation circuit configured to perform a non-linear transformation on the first data or the second mask data selected by the first selector;

a second calculator configured to calculate second data based upon the first data on which the non-linear transformation is performed by the first non-linear transformation circuit, and the mask data retained in the mask register;

a third linear transformation circuit configured to perform a linear transformation on the second data;

a second selector configured to select either one of the key data retained in the key register and the second mask data; and

a second non-linear transformation circuit configured to perform a non-linear transformation on the key data or the second mask data selected by the second selector, wherein

the second data on which the linear transformation is performed by the third linear transformation circuit is retained in the data register as new data to be processed,

the key data on which the non-linear transformation is performed by the second non-linear transformation circuit is retained in the key register as new key data, and

the second mask data on which the non-linear transformation is performed by the first non-linear transformation circuit or the second non-linear transformation circuit is retained in the mask register as new mask data.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 13, 2012
From: KAWABATA, TAKESHI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 028954/0625 →
Priority Claims (1)
JP 2011-210966 · Sep 27, 2011 · national
Continuity (1)
Related Publication 20130077790A1 · Mar 28, 2013