IP Library › Granted Patent US 8,729,667
Granted Patent B2
US 8,729,667 · App. 13/609,679 · Granted May 20, 2014

Non-volatile memory device and method of manufacturing the same

Inventor: Takuji Kuniya (Mie, JP)
Assignee: Kabushiki Kaisha Toshiba
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Quick Facts
Patent No.
US 8,729,667
App. No.
13/609,679
Granted
May 20, 2014
Kind
B2
Abstract

According to one embodiment, a second electrode layer is formed on first structures where a first electrode layer and a first memory cell layer sequentially stacked above a substrate are patterned in a line-and-space shape extending in a first direction and a first interlayer insulating film embedded between the first structures. Etching is performed from the second electrode layer to a predetermined position in an inner portion of the first memory cell layer by using a first mask layer having a line-and-space pattern extending in a second direction, so that a first trench is formed. A first modifying film is formed on a side surface of the first trench, anisotropic etching is performed on the first memory cell layer by using the first mask layer, and after that, isotropic etching is performed.

Claims (9)

1. A non-volatile memory device comprising:

a first wiring extending in a first direction;

a second wiring extending in a second direction perpendicular to the first direction; and

a non-volatile memory cell which is disposed at an intersection position of the first wiring and the second wiring so as to be interposed between the first and second wirings and is configured so that a rectifying layer and a variable resistive layer are sequentially stacked above the first wiring, wherein

the rectifying layer includes a first area having a width which is substantially equal to a width of the second wiring, and a second area which is formed on the first wiring side to have a width smaller than the width of the first area and to have a thickness which is ⅓ or more of a height of the rectifying layer, at a cross section perpendicular to the second direction.

2. The non-volatile memory device according to claim 1 , further comprising a modifying film on two side surfaces in the first direction from the first area of the rectifying layer to the second wiring.

3. The non-volatile memory device according to claim 2 , wherein the modifying film is disposed on two side surfaces in the second direction from the rectifying layer to the variable resistive layer.

4. The non-volatile memory device according to claim 2 , wherein the modifying film is an oxide film or a nitride film.

5. The non-volatile memory device according to claim 1 , wherein the variable resistive layer is a metal oxide film containing at least one or more element selected from a group consisting of Si, Ti, Ta, Nb, Hf, Zr, W, Al, Ni, Co, Mn, Fe, Cu, and Mo, a carbon film, or a chalcogenide compound film.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2012
From: KUNIYA, TAKUJI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 028934/0311 →
Priority Claims (1)
JP 2012-011354 · Jan 23, 2012 · national
Continuity (1)
Related Publication 20130187112A1 · Jul 25, 2013