Photosensor and photosensor array with capacitive element

1. A photosensor, comprising:

a lower electrode formed of a metal film;

an amorphous silicon film disposed on the lower electrode;

an n-type amorphous silicon film disposed on the amorphous silicon film;

an upper electrode that is disposed on the n-type amorphous silicon film, and receives a first reference voltage;

a switch circuit that inputs a first supply voltage to the lower electrode in an on-state, and puts the lower electrode into a floating state in an off-state;

a detector circuit that detects a voltage change in the lower electrode after irradiating the amorphous silicon film for a given period with light when the switch circuit is on; and

a capacitive element connected between the lower electrode and a second reference voltage.

2. The photosensor according to claim 1 , wherein the first reference voltage and the second reference voltage have the same voltage.

3. A photosensor, comprising:

a lower electrode formed of a metal film;

an amorphous silicon film disposed on the lower electrode;

an n-type amorphous silicon film disposed on the amorphous silicon film;

an upper electrode that is disposed on the n-type amorphous silicon film, and receives a first reference voltage;

a switch circuit that inputs a first supply voltage to the lower electrode in an on-state, and puts the lower electrode into a floating state in an off-state; and

a detector circuit that detects a voltage change in the lower electrode after irradiating the amorphous silicon film for a given period with light when the switch circuit is on;

wherein a thickness of the amorphous silicon film is 500 nm or higher.

4. The photosensor according to claim 3 , wherein a thickness of the amorphous silicon film is 1200 nm or lower.

5. A photosensor array, comprising:

(m×n) photosensor pixels arranged in an array; and

n read lines,

wherein each of the photosensor pixels includes:

a lower electrode formed of a metal film;

an amorphous silicon film disposed on the lower electrode;

an n-type amorphous silicon film disposed on the amorphous silicon film;

an upper electrode that is disposed on the n-type amorphous silicon film, and receives first reference voltage; and

a first transistor having a second electrode connected to a corresponding read line of the n read lines, a first electrode connected to the lower electrode, and a control electrode receiving a first clock;

wherein each of the photosensor pixels whose first transistors is on outputs voltage change to one of the read lines within one horizontal scanning period as a sensor output voltage of the photosensor pixels; and

wherein each of the photosensor pixels includes a capacitive element connected between the lower electrode and a second reference voltage.

6. The photosensor array according to claim 5 ,

wherein the first reference voltage and the second reference voltage have the same voltage.

7. A photosensor array, comprising:

(m×n) photosensor pixels arranged in an array; and

n read lines,

wherein each of the photosensor pixels includes:

a lower electrode formed of a metal film;

an amorphous silicon film disposed on the lower electrode;

an n-type amorphous silicon film disposed on the amorphous silicon film;

an upper electrode that is disposed on the n-type amorphous silicon film, and receives a first reference voltage; and

a first transistor having a second electrode connected to a corresponding read line of the n read lines, a first electrode connected to the lower electrode, and a control electrode receiving a first clock;

wherein each of the photosensor pixels whose first transistor is on outputs a voltage change to one of the read lines within one horizontal scanning period as a sensor output voltage of the photosensor pixels; and

n second transistors each having a first electrode connected to a corresponding read line of the n read lines, a second electrode receiving a first supply voltage, and a control electrode receiving a second clock.

8. The photosensor array according to claim 7 , wherein each of the second transistors inputs the first supply voltage to each of the read lines when turning on according to the second clock, and puts each of the read lines into a floating state in an off period until subsequently receiving the second clock.

9. The photosensor array according to claim 8 , wherein the first clock turns on after the second clock, and the first transistor in each of the photosensor pixels connects the lower electrode and each of the read lines when turning on according to the first clock.

10. The photosensor array according to claim 7 ,

wherein the first supply voltage is higher than the first reference voltage.

11. A photosensor array, comprising:

(m×n) photosensor pixels and (m×1) compensation photosensor pixels arranged in an array;

n read lines, and

a compensation pixel read line,

wherein each of the photosensor pixels includes:

a lower electrode formed of a metal film;

an amorphous silicon film disposed on the lower electrode;

an n-type amorphous silicon film disposed on the amorphous silicon film;

an upper electrode that is disposed on the n-type amorphous silicon film, and receives a first reference voltage; and

a first transistor having a second electrode connected to a corresponding read line of the n read lines, a first electrode connected to the lower electrode, and a control electrode receiving a first clock,

wherein each of the compensation photosensor pixels includes:

a lower electrode formed of a metal film;

an amorphous silicon film disposed on the lower electrode;

the amorphous silicon film blocked from light;

an n-type amorphous silicon film disposed on the amorphous silicon film;

an upper electrode that is disposed on the n-type amorphous silicon film, and receiving a first reference voltage; and

a second transistor having a second electrode connected to the compensation pixel read line, a first electrode connected to the lower electrode, and a control electrode receiving a first clock, and

wherein each of the photosensor pixels outputs a voltage corresponding to the amount of light input to the amorphous silicon film as a sensor output voltage.

12. The photosensor array according to claim 11 ,

wherein each of the photosensor pixels and the compensation photosensor pixels has a capacitive element that is connected between the lower electrode and the second reference voltage.

13. The photosensor array according to claim 11 , further comprising:

n third transistors each having a first electrode connected to a corresponding read line of the n read lines, a second electrode receiving a first supply voltage, and a control electrode receiving a second clock; and

a fourth transistor having a first electrode connected to the compensation pixel read line, a second electrode receiving the first supply voltage, and a control electrode receiving the second clock.

14. The photosensor array according to claim 13 ,

wherein each of the third transistors inputs the first supply voltage to each of the read lines when turning on according to the second clock, and puts each of the read lines into a floating state in an off period until subsequently receiving the second clock, and

wherein the fourth transistor inputs the first supply voltage to the compensation pixel read lines when turning on according to the second clock, and puts the compensation pixel read lines into the floating state in the off period until subsequently receiving the second clock.

15. The photosensor array according to claim 14 ,

wherein the first clock turns on after the second clock, the first transistor in each of the photosensor pixels connects the lower electrode and a corresponding read line of the n read lines when turning on according to the first clock, and the second transistor in each of the compensation photosensor pixels connects the lower electrode and the compensation pixel read line when turning on according to the first clock.

16. A photosensor array, comprising:

(m×n) photosensor pixels arranged in an array; and

n read lines,

wherein each of the photosensor pixels includes:

a lower electrode formed of a metal film;

an amorphous silicon film disposed on the lower electrode;

an n-type amorphous silicon film disposed on the amorphous silicon film;

an upper electrode that is disposed on the n-type amorphous silicon film, and receives a first reference voltage; and

a first transistor having a second electrode connected to a corresponding read line of the n read lines, a first electrode connected to the lower electrode, and a control electrode receiving a first clock;

wherein each of the photosensor pixels whose first transistor is on outputs a voltage change to one of the read lines within one horizontal scanning period as a sensor output voltage of the photosensor pixels; and

a first reference voltage line that applies the first reference voltage;

a second reference voltage line that applies the second reference voltage;

a first supply voltage line that applies the first supply voltage;

m scanning lines that supply the first clock; and

a second clock line that supplies the second clock.

17. The photosensor array according to claim 16 , further comprising: a scanning circuit that is connected to the m scanning lines, and sequentially supplies the first clock to the respective scanning lines every one horizontal scanning period.