IP Library Granted Patent US 8,765,489
Granted Patent B2
US 8,765,489 · App. 13/529,051 · Granted Jul 1, 2014

Semiconductor device and method for fabricating the same

Inventors: Jung Woo Park (Seoul, KR); Gil Jae Park (Busan, KR); Ki Seon Park (Seoul, KR)
Assignee: SK Hynix Inc.
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Quick Facts
Patent No.
US 8,765,489
App. No.
13/529,051
Granted
Jul 1, 2014
Kind
B2
Abstract

A method for fabricating a semiconductor device includes forming a magnetic tunnel junction (MTJ) element on a substrate, forming a first capping layer along the shape of the MTJ element, forming an insulating layer on the first capping layer, forming a trench exposing a portion of the first capping layer above the MTJ element by selectively etching the insulating layer, forming a second capping layer on sidewalls of the trench, removing the exposed portion of the first capping layer using the second capping layer as an etching mask to expose an upper surface of the MTJ element, and forming a conductive layer in the trench, wherein the conductive layer contacts the upper surface of the MTJ element.

Claims (12)

1. A method for fabricating a semiconductor device, comprising:

forming a magnetic tunnel junction (MTJ) element on a substrate;

forming a first capping layer along the shape of the MTJ element;

forming an insulating layer on the first capping layer;

forming a trench exposing a portion of the first capping layer above the MTJ element by selectively etching the insulating layer;

forming a second capping layer on sidewalls of the trench;

removing the exposed portion of the first capping layer using the second capping layer as an etching mask to expose an upper surface of the MTJ element; and

forming a conductive layer in the trench, wherein the conductive layer contacts the upper surface of the MTJ element.

2. The method according to claim 1 , wherein the width of the second capping layer is less than the half of the width of the trench.

3. The method according to claim 1 , wherein the second capping layer includes a metal layer.

4. The method according to claim 1 , wherein the second capping layer includes Ti/TIN or WN/W.

5. The method according to claim 1 , wherein the first capping layer includes a silicon nitride.

Assignments (2)
CHANGE OF NAME Recorded Apr 22, 2014
From: HYNIX SEMICONDUCTOR INC.
To: SK HYNIX INC.
Reel/Frame 032732/0747 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 21, 2012
From: PARK, JUNG WOO; PARK, GIL JAE; PARK, KI SEON
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 028417/0832 →
Priority Claims (1)
KR 10-2011-0078972 · Aug 9, 2011 · national
Continuity (1)
Related Publication 20130037896A1 · Feb 14, 2013