Semiconductor memory with sense amplifier
In an exemplary aspect, the present invention provides a semiconductor memory device including sense amplifiers that drive bit lines to which memory cells are connected, and driver transistors that supply a power supply to the sense amplifiers, wherein the sense amplifiers are arranged in rows and constitutes a first sense-amplifier row in which transistors of a first conductive type are arranged and a second sense-amplifier row in which transistors of a second conductive type are arranged, and the driver transistors constitutes at least one transistor row including a first driver transistor of the first conductive type corresponding to the first sense-amplifier row and a second driver transistor of the second conductive type corresponding to the second sense-amplifier row between the first sense-amplifier row and the second sense-amplifier row.
1. A semiconductor memory device, comprising:
a plurality of sense amplifiers driving bit lines to which memory cells are connected;
a plurality of sense amplifier drivers supplying a power supply to the sense amplifiers, each of sense amplifier drivers having first and second driver transistors, and the first driver transistor having a first diffusion regions in a first well region and the second driver transistor having a second diffusion region in a second well region which is different conductivity type from the first well region, and
an element separation region formed between the first and second well region,
wherein the first and second driver transistors are arranged in parallel with a first direction so as to be arranged one of second driver transistors between two of the first driver transistors,
wherein the first diffusion region comprises first and second sides, the first side is parallel to the first direction and the second side is perpendicular to the first direction,
wherein the second diffusion region comprises third and fourth sides, the third side is parallel to the first direction and the fourth side is perpendicular to the first direction,
wherein the element separation region extends along the first, second, third and fourth sides.
2. The semiconductor memory device according to claim 1 , wherein the element separation region extends along the first, fourth, second and third sides in this order.
3. The semiconductor memory device according to claim 1 , wherein the sense amplifiers includes a first transistor region having a plurality of first transistors arranged in the first direction and formed in the first well region, the first well region of the first transistors is contiguous with the first well region of the first driver transistor.
4. The semiconductor memory device according to claim 3 , wherein the sense amplifiers further includes a second transistor region having a plurality of second transistors arranged in the first direction and formed in the second well region, the second well region of the second transistors is contiguous with the second well region of the second driver transistor, and the sense amplifier drivers arranged between the first and second transistor regions.
5. The semiconductor memory device according to claim 1 , wherein the sense amplifier drivers further comprises a third driver transistor in the first well region.
6. The semiconductor memory device according to claim 5 , wherein the first driver transistor is supplied with a first power-supply voltage, the third driver transistor is supplied with a second power-supply voltage which is higher or lower than the first power-supply voltage.