Techniques for FinFET doping
A method of forming an integrated circuit includes providing a semiconductor wafer including a semiconductor fin dispatched on a surface of the semiconductor wafer; forming a dopant-rich layer having an impurity on a top surface and sidewalls of the semiconductor fin, wherein the impurity is of n-type or p-type; performing a knock-on implantation to drive the impurity into the semiconductor fin; and removing the dopant-rich layer.
1. A method of forming an integrated circuit, the method comprising:
providing a semiconductor wafer comprising a semiconductor fin dispatched on a surface of the semiconductor wafer;
forming a dopant-rich layer comprising an impurity on a top surface and sidewalls of the semiconductor fin, wherein the dopant-rich layer is a substantially pure layer comprising substantially pure n-type or p-type impurity;
performing a knock-on implantation to drive the impurity into the semiconductor fin, wherein the knock-on implantation is performed using carbon, germanium, argon, or nitrogen to drive the impurity into the semiconductor fin; and
removing the dopant-rich layer substantially completely.
2. The method of claim 1 , wherein the dopant-rich layer is substantially free from elements other than the n-type or p-type impurity.
3. The method of claim 1 , wherein the knock-on implantation is a tilt implantation.
4. The method of claim 1 further comprising, before the step of forming the dopant-rich layer, forming a gate dielectric and a gate electrode on the semiconductor fin.
5. The method of claim 1 , wherein the step of performing the knock-on implantation forms a lightly-doped source/drain (LDD) region of a fin field-effect transistor (FinFET) in the semiconductor fin.
6. The method of claim 1 further comprising:
before the step of forming the dopant-rich layer, forming a photo resist covering a portion of the semiconductor wafer, wherein a portion of the semiconductor fin for forming the dopant rich layer thereon is not covered; and
after the step of performing the knock-on implantation, removing the photo resist.
7. The method of claim 1 , wherein the step of forming the dopant-rich layer comprises a plasma ion assisted deposition.
8. The method of claim 7 , wherein a DC bias power for performing the plasma ion assisted deposition is lower than about 1.5 kV.
9. The method of claim 7 , wherein during the plasma ion assisted deposition, no DC bias voltage is applied.
10. The method of claim 1 , wherein after the step of removing the dopant-rich layer, an entirety of the dopant-rich layer is removed.
11. A method of forming an integrated circuit, the method comprising:
providing a semiconductor wafer comprising a semiconductor fin dispatched on a surface of the semiconductor wafer;
forming a dopant-rich layer comprising an impurity on a top surface and sidewalls of the semiconductor fin, wherein the impurity is of n-type or p-type;
performing a knock-on implantation to drive the impurity into the semiconductor fin, wherein the knock-on implantation forms a lightly-doped source/drain (LDD) region of a fin field-effect transistor (FinFET) in the semiconductor fin, wherein the knock-on implantation is performed using carbon, germanium, argon, or nitrogen to drive the impurity into the semiconductor fin; and
removing the dopant-rich layer substantially completely.
12. The method of claim 11 , wherein the dopant-rich layer comprises a substantially pure n-type or p-type impurity.
13. The method of claim 11 further comprising, before the step of forming the dopant-rich layer, forming a gate dielectric and a gate electrode on the semiconductor fin.
14. The method of claim 11 further comprising:
before the step of forming the dopant-rich layer, forming a photo resist covering a portion of the semiconductor wafer, wherein a portion of the semiconductor fin for forming the dopant rich layer thereon is not covered; and
after the step of performing the knock-on implantation, removing the photo resist.
15. The method of claim 11 , wherein the step of forming the dopant-rich layer comprises a plasma ion assisted deposition.
16. A method of forming an integrated circuit, the method comprising:
providing a semiconductor wafer comprising a semiconductor fin dispatched on a surface of the semiconductor wafer;
foaming a dopant-rich layer comprising an impurity on a top surface and sidewalls of the semiconductor fin, wherein the impurity is of n-type or p-type;
performing a knock-on implantation to drive the impurity into the semiconductor fin, wherein the knock-on implantation is performed using carbon, germanium, argon, or nitrogen to drive the impurity into the semiconductor fin; and
removing the dopant-rich layer substantially completely.
17. The method of claim 16 , wherein the dopant-rich layer is a substantially pure n-type or p-type impurity layer, with substantially no other elements other than the n-type or p-type impurity therein.
18. The method of claim 16 , wherein the step of forming the dopant-rich layer comprises a plasma ion assisted deposition.