Decision feedforward equalization
In described embodiments, a Decision Feed Forward Equalizer (DFFE) comprises a hybrid architecture combining features of a Feed Forward Equalizer (FFE) and a Decision Feedback Equalizer (DFE). An exemplary DFFE offers relatively improved noise and crosstalk immunity than an FFE implementation alone, and relatively lower burst error propagation than a DFE implementation alone. The exemplary DFFE is a relatively simple implementation due few or no critical feedback paths, as compared to a DFE implementation alone. The exemplary DFFE allows for a parallel implementation of its DFE elements without an exponential increase in the hardware for higher numbers of taps. The exemplary DFFE allows for cascading, allowing for progressive improvement in BER, at relatively low implementation cost as a solution to achieve multi-tap DFE performance.
1. Apparatus for generating data from an input signal received from a channel, the apparatus comprising:
a sampling module configured to generate samples from the input signal;
a feed-forward equalizer stage configured to i) apply feed-forward equalization to the samples and ii) generate feed-forward decisions corresponding to the samples, wherein the feed-forward equalizer stage comprises:
a feed-forward equalizer configured to apply feed-forward equalization to the samples; and
a feed-forward equalizer stage decision device configured to generate feed-forward decisions corresponding to the samples based on a comparison of each feed-forward equalized sample with at least one corresponding threshold;
a decision feed-forward stage comprising:
a latency matching module configured to adjust a delay of the feed forward equalized samples in accordance with the feed-forward decisions corresponding to the samples to generate latency-matched feed-forward equalized samples,
logic configured to i) generate a combination of the feed-forward equalized decisions and at least one filter tap value based on a transfer function of the channel, and ii) subtract the combination from the latency-matched feed-forward equalized samples, and
a decision device configured to generate decision feed-forward equalized (DFFE) decisions from the output of the logic.
2. The apparatus of claim 1 , further comprising at least one subsequent decision feed-forward stage, each subsequent decision feed-forward stage comprising:
a corresponding latency matching module configured to adjust a delay of the feed-forward equalized samples in accordance with i) the feed-forward decisions corresponding to the samples and ii) DFFE decisions of a previous decision feed-forward stage to generate corresponding latency-matched feed-forward equalized samples,
corresponding logic configured to i) generate a corresponding combination of the DFFE decisions of the previous decision feed-forward stage and at least one filter tap value based on a transfer function of the channel, and ii) subtract the corresponding combination from the latency-matched feed-forward equalized samples of the corresponding latency matching module, and
a decision device configured to generate subsequent DFFE decisions from the output of the corresponding logic.
3. The apparatus of claim 2 , wherein the apparatus further comprises a pre-cursor ISI correction decision feed-forward stage comprising:
a corresponding latency matching module coupled to the sampling module and configured to adjust a delay of the samples in accordance with i) the feed-forward decisions corresponding to the samples and ii) DFFE decisions of a previous decision feed-forward stage to generate corresponding latency-matched samples,
corresponding logic configured to i) generate a corresponding combination of the DFFE decisions of the previous decision feed-forward stage and at least one filter tap value based on a transfer function of the channel, and ii) subtract the corresponding combination from the latency-matched samples of the corresponding latency matching module, and
a decision device configured to generate: subsequent pre-cursor ISI correction DFFE decisions from the output of the corresponding logic.
4. The apparatus of claim 1 , wherein the feed-forward equalizer includes a decision feedback equalizer adapted to adjust the feed-forward equalized samples.
5. The apparatus of claim 1 , wherein each decision device is at least one of a comparator and a slicer.
6. The apparatus of claim 1 , wherein the logic comprises a multiplier and a combiner, wherein:
the multiplier is adapted to multiply the feed-forward equalized decisions with the at least one filter tap value to generate a reconstructed signal (inter-symbol interference) ISI, and
the combiner subtracts the reconstructed signal ISI from the latency-matched feed-forward equalized samples.
7. The apparatus of claim 1 , wherein the combination from the logic represents inter-symbol interference (ISI) to a transmitted symbol from one or more previous transmitted symbols transferred through the channel.
8. The apparatus of claim 1 , wherein the apparatus is embodied in a receiver of a Serializer-Deserializer (SerDes) device.
9. A method of generating data from an input signal received from a channel, the method comprising the steps of:
generating samples from the input signal with a sampling module;
applying, by a feed-forward equalizer stage configured to, feed-forward equalization to the samples and thereby generating feed-forward decisions corresponding to the samples, wherein the applying the feed-forward equalization to the samples comprises:
applying, by a feed-forward equalizer, feed-forward equalization to the samples; and
generating, by a feed-forward equalizer stage decision device, feed-forward decisions corresponding to the samples based on a comparison of each feed-forward equalized sample with at least one corresponding threshold;
adjusting, by a decision feed-forward stage, a delay of the feed-forward equalized samples in accordance with the feed-forward decisions corresponding to the samples, thereby generating latency-matched feed-forward equalized samples,
generating a combination of the feed-forward equalized decisions and at east one filter tap value based on a transfer function of the channel;
subtracting the combination from the latency-matched feed-forward equalized samples, thereby providing a compensated signal, and
generating decision feed-forward equalized (DFFE) decisions from the compensated signal.
10. The method of claim 9 , further comprising, by at least one subsequent decision feed-forward stage:
adjusting, by a corresponding latency matching module of each subsequent decision feed-forward stage, a delay of the feed-forward equalized samples in accordance with i) the feed-forward decisions corresponding to the samples and ii) DFFE decisions of a previous decision feed-forward stage, thereby generating corresponding latency-matched feed-forward equalized samples;
generating a corresponding combination of the DFFE decisions of the previous decision feed-forward stage and at least one filter tap value based on a transfer function of the channel;
subtracting the corresponding combination from the latency-matched feed-forward equalized samples of the corresponding latency matching module, thereby providing a subsequent corresponding compensated signal; and
generating, with a corresponding subsequent decision device, subsequent DFFE decisions from subsequent corresponding compensated signal.
11. The method of claim 10 , further comprising, by a pre-cursor ISI correction decision feed-forward stage:
adjusting, with a corresponding latency matching module coupled to the sampling module, a delay of the samples in accordance with i) the feed-forward decisions corresponding to the samples and ii) DFFE decisions of a previous decision feed-forward stage to generate corresponding latency-matched samples,
generating a corresponding combination of the DFFE decisions of the previous decision feed-forward stage and at least one filter tap value based on a transfer function of the channel, and subtracting the corresponding combination from the latency-matched samples of the corresponding latency matching module, thereby providing a pre-cursor ISI correction compensated signal; and
generating subsequent pre-cursor ISI correction DFFE decisions from the pre-cursor ISI correction compensated signal.
12. The method of claim 9 , wherein the applying the feed-forward equalization to the samples comprises applying a decision feedback equalization, thereby adjusting the feed-forward equalized samples.
13. The method of claim 9 , wherein the generating decision feed-forward equalized (DFFE) decisions employs at least one of a comparator and a slicer.
14. The method of claim 9 , comprising:
multiplying the feed-forward equalized decisions with the at least one filter tap value to generate a reconstructed signal (inter-symbol interference) ISI, and
wherein the subtracting subtracts the reconstructed signal ISI from the latency-matched feed-forward equalized samples.
15. The method of claim 9 , wherein the compensated signal represents inter-symbol interference (ISI) to a transmitted symbol from one or more previous transmitted symbols transferred through the channel.
16. The method of claim 9 , wherein the method is embodied as program steps of a processor in a receiver of a Serializer-Deserializer (SerDes) device.
17. A non-transitory machine-readable storage meditate, having encoded thereon program code, wherein, when the program code is executed by a machine, the machine implements a method for generating data from an input signal received from a channel comprising the steps of:
generating samples from the input signal;
applying, by a feed-forward equalizer stage configured to, feed-forward equalization to the samples and thereby generating feed-forward decisions corresponding to the samples, wherein the applying the feed-forward equalization to the samples comprises:
applying, by a feed-forward equalizer, feed-forward equalization to the samples; and
generating, by a feed-forward equalizer stage decision device, feed-forward decisions corresponding to the samples based on a comparison of each feed-forward equalized sample with at least one corresponding threshold;
adjusting, by a decision feed-forward stage, a delay of the feed-forward equalized samples in accordance with the feed-forward decisions corresponding to the samples, thereby generating latency-matched feed-forward equalized samples,
generating a combination of the feed-forward equalized decisions and at least one filter tap value based on a transfer function of the channel;
subtracting the combination from the latency-matched feed-forward equalized samples, thereby providing a compensated signal, and
generating decision feed-forward equalized (DFFE) decisions from the compensated signal.