IP Library › Granted Patent US 8,796,128
Granted Patent B2
US 8,796,128 · App. 13/367,419 · Granted Aug 5, 2014

Dual metal fill and dual threshold voltage for replacement gate metal devices

Inventors: Lisa F. Edge (Albany, NY); Nathaniel Berliner (Albany, NY); James John Demarest (Albany, NY); Balasubramanian S. Haran (Albany, NY); Raymond J. Donohue (Selkirk, NY)
Assignee: International Business Machines Corporation
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Quick Facts
Patent No.
US 8,796,128
App. No.
13/367,419
Granted
Aug 5, 2014
Kind
B2
Abstract

A structure and method for forming a dual metal fill and dual threshold voltage for replacement gate metal devices is disclosed. A selective deposition process involving titanium and aluminum is used to allow formation of two adjacent transistors with different fill metals and different workfunction metals, enabling different threshold voltages in the adjacent transistors.

Claims (34)

1. A method for forming two transistors having different threshold voltages comprising:

forming a first gate cavity in a first transistor and a second gate cavity in a second transistor;

depositing a gate dielectric film in the first gate cavity and the second gate cavity;

depositing a first workfunction metal in the first gate cavity and the second gate cavity;

depositing a titanium layer in the first gate cavity and the second gate cavity;

removing the titanium layer from the second gate cavity, thereby leaving a remaining portion of the titanium layer disposed in the first gate cavity;

depositing a first fill metal of aluminum on the remaining portion of the titanium layer via a selective deposition process without depositing a mask on the second gate cavity, wherein the first fill metal of aluminum is not deposited above the second gate cavity;

depositing a second workfunction metal in the second gate cavity;

depositing a second fill metal in the second gate cavity; and

planarizing the first and second transistors.

2. The method of claim 1 , wherein depositing a first fill metal comprises depositing the first fill metal only on the remaining portion of the titanium and not depositing the first fill metal on the exposed first workfunction metal in the second gate cavity.

3. The method of claim 1 , wherein depositing a gate dielectric film comprises depositing hafnium oxide.

4. The method of claim 1 , wherein depositing a first workfunction metal comprises depositing titanium nitride.

5. The method of claim 1 , wherein depositing a first workfunction metal is performed via atomic layer deposition.

6. The method of claim 1 , wherein depositing a titanium layer is performed by plasma vapor deposition.

7. The method of claim 1 , wherein removing the titanium layer from the second gate cavity is performed via a sputter etch.

8. The method of claim 1 , wherein depositing a second workfunction metal comprises depositing titanium aluminum nitride.

9. The method of claim 1 , wherein depositing a second workfunction metal comprises depositing tantalum carbide.

10. The method of claim 1 , wherein depositing a second fill metal in the second gate cavity comprises depositing tungsten.

11. The method of claim 1 , wherein depositing a second fill metal in the second gate cavity comprises depositing a material selected from the group consisting of cobalt, molybdenum, ruthenium, and nickel.

12. A method for forming two transistors having different threshold voltages comprising:

forming a first gate cavity in a first transistor and a second gate cavity in a second transistor;

depositing a gate dielectric film in the first gate cavity and the second gate cavity;

depositing a first workfunction metal in the first gate cavity and the second gate cavity;

depositing a titanium layer in the first gate cavity and the second gate cavity;

depositing a hardmask layer in the first gate cavity and the second gate cavity;

removing a portion of the hardmask layer from the second gate cavity;

removing the titanium layer from the second gate cavity, thereby leaving a remaining portion of the titanium layer disposed in the first gate cavity;

removing the hardmask layer from the first gate cavity;

depositing a first fill metal comprised of aluminum on the remaining portion of the titanium layer via a selective deposition process without depositing a mask on the second gate cavity, wherein the first fill metal of aluminum is not deposited above the second gate cavity;

depositing a second workfunction metal in the second gate cavity;

depositing a second fill metal in the second gate cavity; and

planarizing the first and second transistors.

13. The method of claim 12 , wherein depositing a first fill metal comprises depositing aluminum.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2014
From: DONOHOE, RAYMOND J.
To: APPLIED MATERIALS, INC.
Reel/Frame 032860/0426 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 7, 2012
From: EDGE, LISA F.; BERLINER, NATHANIEL; DEMAREST, JAMES JOHN; HARAN, BALASUBRAMANIAN S.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 027661/0878 →
Continuity (1)
Related Publication 20130200467A1 · Aug 8, 2013