IP Library Granted Patent US 8,809,162
Granted Patent B2
US 8,809,162 · App. 12/840,125 · Granted Aug 19, 2014

Method for manufacturing a semiconductor device comprising a guard ring between a cell region and a peripheral region

Inventors: Dong Geun Lee (Seoul, KR); Sung Hyun Kim (Seoul, KR)
Assignee: Hynix Semiconductor Inc.
H01L27/105H01L21/76229H01L27/10894H01L23/585H01L27/0207
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Quick Facts
Patent No.
US 8,809,162
App. No.
12/840,125
Granted
Aug 19, 2014
Kind
B2
Abstract

A semiconductor device including a cell region and a peripheral region, the semiconductor device comprising: a guard ring region provided between the cell region and the peripheral region, the guard ring region having a barrier structure.

Claims (16)

1. A method for manufacturing a semiconductor memory device, the method comprising:

providing a substrate having a cell region, a peripheral region, and a guard ring region provided between the cell region and the peripheral region;

etching a second active region in the guard ring region to form a recess in the substrate;

filling a conductive material into the recess; and

depositing an insulating film within the recess over the conductive material to form a barrier gate in the second active region of the guard ring region,

wherein the barrier gate has a guard ring structure surrounding the cell region, and

wherein the cell region has a first active region and a first device isolation structure, the peripheral region has a second device isolation structure, and the guard ring region has the second active region between the first device isolation structure and the second device isolation structure.

2. The method according to claim 1 , wherein the conductive material includes any selected from the group consisting of tungsten, a titanium nitride film and a combination thereof.

3. The method according to claim 1 , wherein the insulating film includes a nitride film,

wherein the insulating film is deposited over the peripheral region and the guard ring region while the insulating film is being deposited within the recess, and

wherein the method further comprises:

removing a portion of the insulating film overlying the peripheral region with a mask that exposes only the peripheral region.

4. The method according to claim 1 , wherein the barrier gate is formed when a cell gate in the cell region is formed.

5. The method according to claim 1 , wherein the guard ring region encloses perimeters of the cell region.

6. The method according to claim 1 , wherein the substrate in the cell region is etched to form a recess in the cell region when the substrate in the guard ring region is etched, and

wherein the recess in the cell region is filled with the conductive material to form a cell gate when the recess in the guard ring region is filled with the conductive material to form the barrier gate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 20, 2010
From: LEE, DONG GEUN; KIM, SUNG HYUN
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 024716/0657 →
Priority Claims (1)
KR 10-2010-0037524 · Apr 22, 2010 · national
Continuity (1)
Related Publication 20110260286A1 · Oct 27, 2011