IP Library › Granted Patent US 8,822,831
Granted Patent B2
US 8,822,831 · App. 13/454,100 · Granted Sep 2, 2014

Circuit board

Inventor: Yuichi Yokoyama (Nara, JP)
Assignee: Panasonic Corporation
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Quick Facts
Patent No.
US 8,822,831
App. No.
13/454,100
Granted
Sep 2, 2014
Kind
B2
Abstract

Lamination circuit board in which ground and conductor layers are laminated via an electrically insulating layer. Various configurations allow the ground layer to realize characteristic impedance matching in the circuit board: (a) One having at least a removal region where at least a projection region, being the conductor layer orthogonally projected onto the ground layer, is removed; (b) One in which in the lamination the conductor layer, a signal transmission line, and the ground layer are laminated in that order via the electrically insulating layer, and having at least a removal region where the conductor layer and the signal transmission line overlap; and (c) One in which in the lamination a signal transmission line, the ground layer, and the conductor layer are laminated in that order via the electrically insulating layer, and having at least a removal region where the conductor layer and the signal transmission line overlap.

Claims (20)

1. A circuit board comprising:

a lamination configuration in which a ground layer and a conductor layer are laminated via an electrically insulating layer, wherein:

the ground layer has at least a removal region where at least a projection region being the conductor layer orthogonally projected onto the ground layer is removed;

the lamination configuration includes a signal transmission line between the ground layer and the conductor layer;

the removal region contains at least an overlap region in a projection region being the conductor layer and the signal transmission line orthogonally projected onto the ground layer; and

the signal transmission line includes a pair of differential signal transmission lines.

2. The circuit board according to claim 1 , further comprising a via extending thickness-wise through the electrically insulating layer and electrically connecting the signal transmission line to the conductor layer.

3. The circuit board according to claim 2 , wherein the signal transmission line and the conductor layer are a via pad electrically connected to the via.

4. The circuit board according to claim 1 , wherein the conductor layer, the signal transmission line, and the ground layer are laminated in that order via the electrically insulating layer in the lamination configuration.

5. The circuit board according to claim 4 , wherein the conductor layer is a surface-layer ground layer included in a first layer in the lamination configuration.

6. The circuit board according to claim 5 , wherein:

the lamination configuration includes signal transmission lines in a plurality of layers disposed so as to be laminated via the electrically insulating layers, and a plurality of vias electrically connecting the signal transmission lines in the plurality of layers and extending thickness-wise through the electrically insulating layers;

each of the signal transmission lines in the plurality of layers has an even number of arrayed lines including at least a pair of adjacent differential signal transmission lines; and

the removal region is included in each of all layers between the plurality of layers, the removal region having substantially the same shape as a projection region being the orthogonal projection, onto the ground layer, of a pair of the vias provided so as to extend through a plurality of the electrically insulating layers and electrically connecting the respective differential signal transmission lines of the signal transmission lines in the plurality of layers, and of a pair of via pads electrically connecting the pair of the vias.

7. The circuit board according to claim 4 , wherein the lamination configuration:

includes signal transmission lines in a plurality of layers disposed so as to be laminated via the electrically insulating layers, and a plurality of vias extending through the electrically insulating layer thickness-wise and electrically connecting the signal transmission lines in the plurality of layers;

is provided with two of the vias extending through the electrically insulating layer in a first layer present in the topmost surface of the lamination configuration, and each electrically connecting the two adjacent signal transmission lines;

includes the two via pads electrically connecting the two vias; and

includes the removal region having substantially the same shape as a projection region being the via pads orthogonally projected onto the ground layer.

8. The circuit board according to claim 1 , wherein the signal transmission line, the ground layer, and the conductor layer are laminated in that order via the electrically insulating layer in the lamination configuration.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 29, 2012
From: YOKOYAMA, YUICHI
To: PANASONIC CORPORATION
Reel/Frame 028465/0387 →
Priority Claims (1)
JP 2011-097479 · Apr 25, 2011 · national
Continuity (1)
Related Publication 20120325542A1 · Dec 27, 2012