Semiconductor and optoelectronic devices

1. An integrated device, comprising:

a first crystalline layer covered by an oxide layer,

a second crystalline layer overlying said oxide layer,

wherein said first and second crystalline layers are image sensor layers,

and said device comprises a third crystalline layer, wherein

said third crystalline layer comprises single crystal transistors.

2. An integrated device according to claim 1 , wherein

at least one of said image sensor layers and said single crystal transistors are aligned to each other.

3. An integrated device according to claim 1 , wherein

said first crystalline layer is sensitive to a different spectrum than said second crystalline layer.

4. An integrated device according to claim 1 , wherein

said first crystalline layer has at least an order of magnitude difference in light sensitivity than said second crystalline layer.

5. An integrated device according to claim 1 , wherein

at least one of said image sensor layers comprises a polarizer.

6. An integrated device according to claim 1 , wherein

said single crystal transistors form a plurality of pixel control circuits.

7. An integrated image sensor, comprising:

a first mono-crystal layer to comprise a plurality of image sensor pixels and alignment marks, and

an oxide layer overlaying and on top of said first mono-crystal layer, and

a second mono-crystal layer to comprise a plurality of second image sensor pixels aligned to said alignment marks, and said second mono-crystal layer overlaying said oxide layer, and

a third mono-crystal layer, wherein

said third mono-crystal layer to comprise a plurality of single crystal transistors aligned to said alignment marks.

8. An integrated device according to claim 7 , wherein

said third mono-crystal layer is less than 2 microns thick.

9. An integrated device according to claim 7 , wherein

said aligned comprises less than 1 micron alignment error.

10. An integrated device according to claim 7 , wherein

said first mono-crystal layer is sensitive to a different spectrum than said second mono-crystal layer.

11. An integrated device according to claim 7 , wherein

said first mono-crystal layer has at least an order of magnitude difference in light sensitivity than said second mono-crystal layer.

12. An integrated device according to claim 7 , wherein

at least one of said first mono-crystal and said second mono-crystal layers is less than 2 microns thick.

13. An integrated device according to claim 7 , wherein

at least one of said first mono-crystal and said second mono-crystal layers comprise a polarizer.

14. An integrated device according to claim 7 , wherein

said single crystal transistors form a plurality of pixel control circuits.

15. An integrated device, comprising:

a first mono-crystal layer to comprise a plurality of single crystal transistors and alignment marks, and

an overlaying oxide on top of said first mono-crystal layer, and

a second mono-crystal layer overlaying said oxide, and

wherein said second mono-crystal layer to comprise a plurality of image sensor pixels aligned to said alignment marks.

16. An integrated device according to claim 15 , wherein

said second mono-crystal layer is less than 2 microns thick.

17. An integrated device according to claim 15 , wherein

said image sensor pixels and said single crystal transistors are aligned to each other.

18. An integrated device according to claim 15 , wherein

said second mono-crystal layer comprises two crystalline layers, wherein;

said two crystalline layers comprise a first image sensor layer and a second image sensor layer, and wherein;

said first image sensor layer is sensitive to a different spectrum than said second image sensor layer.

19. An integrated device according to claim 15 , wherein

said second mono-crystal layer comprises two crystalline layers, wherein;

said two crystalline layers comprise a first image sensor layer and a second image sensor layer, and wherein;

said first image sensor layer has at least an order of magnitude difference in light sensitivity than said second image sensor layer.

20. An integrated device according to claim 15 , wherein

said second mono-crystal layer comprises two crystalline layers, wherein;

said two crystalline layers comprise a first image sensor layer and a second image sensor layer, and wherein;

at least one of said two crystalline layers is less than 2 microns thick.

21. An integrated device according to claim 15 , wherein

said second mono-crystal layer comprises a polarizer.

22. An integrated device according to claim 15 , wherein

said single crystal transistors form a plurality of pixel control circuits.