Fabrication of semiconductor stacks with ruthenium-based materials
This disclosure provides a method of fabricating a semiconductor stack and associated device such as a capacitor and DRAM cell. In particular, a bottom electrode upon which a dielectric layer is to be grown may have a ruthenium-based surface. Lattice matching of the ruthenium surface with the dielectric layer (e.g., titanium oxide, strontium titanate or barium strontium titanate) helps promote the growth of rutile-phase titanium oxide, thereby leading to higher dielectric constant and lower effective oxide thickness. The ruthenium-based material also provides a high work function material, leading to lower leakage. To mitigate nucleation delay associated with the use of ruthenium, an adherence or glue layer based in titanium may be employed. A pretreatment process may be further employed so as to increase effective capacitor plate area, and thus promote even further improvements in dielectric constant and effective oxide thickness (“EOT”).
1. A method of forming an electronic device stack, the method comprising:
forming a titanium-based layer above a substrate, the titanium-based layer having a composition of at least titanium, oxygen, carbon and nitrogen;
forming a ruthenium-based material layer above the titanium-based layer, such that the titanium-based layer is between the ruthenium-based material layer and the substrate, the ruthenium-based material layer forming at least part of a first electrode;
forming a metal oxide layer to lie above the ruthenium-based material layer; and
forming a second electrode above the metal oxide layer.
2. The method of claim 1 , where forming the metal oxide layer includes using an atomic layer deposition process.
3. The method of claim 2 , where forming the metal oxide layer includes creating a layer of doped metal oxide characterized by an effective oxide thickness (EOT) of less than one-half nanometer.
4. The method of claim 3 , where creating the layer of doped metal oxide includes creating a doped titanium oxide, where the dopant includes a metal selected from a group consisting of aluminum, scandium, strontium and yttrium.
5. The method of claim 1 , where the second electrode includes titanium and where the metal oxide layer includes a compound selected from the group consisting of titanium oxide, strontium titanate and barium strontium titanate.
6. The method of claim 1 , further comprising oxidizing at least a surface of the ruthenium-based material layer.
7. The method of claim 6 , further comprising using a roughening process to increase effective surface area relative to device cross-sectional area for an interface between the metal oxide layer and at least one of the electrodes.
8. The method of claim 1 , where:
the first electrode includes an electrode base layer and the ruthenium-based material layer, the ruthenium-based material layer employed as a capping layer;
forming the titanium-based layer includes depositing titanium precursor above the base layer, the titanium-based layer in direct contact with each of (a) the base layer and (b) at least some area of the substrate not overlaid with the electrode base layer;
forming the ruthenium-based material layer includes depositing ruthenium material above the titanium-based layer, in direct contact with the titanium-based layer, such that the titanium-based layer provides an interface with the ruthenium-based material layer and at least (b); and
forming the metal oxide layer includes forming titanium oxide to lie in direct contact with the ruthenium-based material layer.
9. The method of claim 8 , where forming the ruthenium-based material layer includes oxidizing at least an exposed surface of ruthenium material to create a ruthenium-based oxide.
10. The method of claim 9 , where forming the metal oxide layer includes forming a titanium-based metal oxide layer using an atomic layer deposition process.
11. The method of claim 1 , further comprising annealing at least the metal oxide layer and ruthenium-based material layer at a temperature of at least four hundred degrees centigrade.
12. The method of claim 11 , where annealing is performed in an oxidizing environment and where at least part of the electronic device stack is characterized by a leakage of less than 100 nanoamperes per square centimeter, measured at 1.0 Volts.
13. The method of claim 1 , where forming the titanium-based layer includes using an atomic layer deposition process to create a titanium-based glue layer having a thickness of no more than ten Angstroms.
14. The method of claim 1 where using an atomic layer deposition process includes using titanium precursor to deposit the titanium-based layer.